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JS28F128P30TF75A 参数 Datasheet PDF下载

JS28F128P30TF75A图片预览
型号: JS28F128P30TF75A
PDF下载: 下载PDF文件 查看货源
内容描述: 恒忆Axcell P30-65nm闪存 [Numonyx Axcell P30-65nm Flash Memory]
分类和应用: 闪存
文件页数/大小: 90 页 / 1194 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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P30-65nm SBC  
Register indicates a ready status (SR.7 = 1). The Status Register should be checked for  
any errors, and then cleared. If the Blank Check operation fails, which means the block  
is not completely erased, the Status Register bit SR.5 will be set (“1”). CE# or OE#  
toggle (during polling) updates the Status Register.  
After examining the Status Register, it should be cleared by the Clear Status Register  
command before issuing a new command. The device remains in Status Register Mode  
until another command is written to the device. Any command can follow once the  
Blank Check command is complete.  
9.3  
Erase Suspend  
Issuing the Erase Suspend command while erasing suspends the block erase operation.  
This allows data to be accessed from memory locations other than the one being  
erased. The Erase Suspend command can be issued to any device address. A block  
erase operation can be suspended to perform a word or buffer program operation, or a  
read operation within any block except the block that is erase suspended (see  
Figure 34, “Erase Suspend/Resume Flowchart” on page 75).  
When a block erase operation is executing, issuing the Erase Suspend command  
requests the WSM to suspend the erase algorithm at predetermined points. The device  
continues to output Status Register data after the Erase Suspend command is issued.  
Block erase is suspended when Status Register bits SR[7,6] are set. Suspend latency is  
specified in Section 15.5, “Program and Erase Characteristics” on page 58.  
To read data from the device (other than an erase-suspended block), the Read Array  
command must be issued. During Erase Suspend, a Program command can be issued  
to any block other than the erase-suspended block. Block erase cannot resume until  
program operations initiated during erase suspend complete. Read Array, Read Status  
Register, Read Device Identifier, Read CFI, and Erase Resume are valid commands  
during Erase Suspend. Additionally, Clear Status Register, Program, Program Suspend,  
Block Lock, Block Unlock, and Block Lock-Down are valid commands during Erase  
Suspend.  
During an erase suspend, deasserting CE# places the device in standby, reducing  
active current. VPP must remain at a valid level, and WP# must remain unchanged  
while in erase suspend. If RST# is asserted, the device is reset.  
9.4  
9.5  
Erase Resume  
The Erase Resume command instructs the device to continue erasing, and  
automatically clears SR[7,6]. This command can be written to any address. If Status  
Register error bits are set, the Status Register should be cleared before issuing the next  
instruction. RST# must remain deasserted.  
Erase Protection  
When VPP = VIL, absolute hardware erase protection is provided for all device blocks. If  
VPP VPPLK, erase operations halt and SR.3 is set indicating a VPP-level error.  
Datasheet  
30  
Apr 2010  
Order Number: 208033-02