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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
DC Characteristics ............................................................335  
Synchronous Master Mode....................................... 217  
Associated Registers, Receive......................... 219  
Associated Registers, Transmit........................ 218  
Reception.......................................................... 219  
Transmission .................................................... 217  
Synchronous Slave Mode......................................... 220  
Associated Registers, Receive......................... 221  
Associated Registers, Transmit........................ 220  
Reception.......................................................... 221  
Transmission .................................................... 220  
Extended Instruction Set  
ADDFSR................................................................... 310  
ADDULNK................................................................. 310  
and Using MPLAB IDE Tools.................................... 316  
CALLW ..................................................................... 311  
Considerations for Use ............................................. 314  
MOVSF..................................................................... 311  
MOVSS..................................................................... 312  
PUSHL...................................................................... 312  
SUBFSR ................................................................... 313  
SUBULNK................................................................. 313  
Syntax....................................................................... 309  
External Clock Input............................................................ 24  
Power-Down and Supply Current..............................325  
Supply Voltage..........................................................324  
DCFSNZ............................................................................287  
DECF.................................................................................286  
DECFSZ............................................................................287  
Development Support........................................................317  
Device Differences ............................................................395  
Device Overview ...................................................................7  
Details on Individual Family Members ..........................8  
Features (table).............................................................9  
New Core Features.......................................................7  
Other Special Features .................................................8  
Device Reset Timers...........................................................45  
Oscillator Start-up Timer (OST) ..................................45  
PLL Lock Time-out......................................................45  
Power-up Timer (PWRT).............................................45  
Time-out Sequence.....................................................45  
Direct Addressing................................................................69  
E
Effect on Standard PIC MCU Instructions.........................314  
Effects of Power-Managed Modes on  
Various Clock Sources................................................31  
Electrical Characteristics...................................................321  
Enhanced Capture/Compare/PWM (ECCP) .....................147  
Associated Registers ................................................160  
Capture and Compare Modes...................................148  
Capture Mode. See Capture (ECCP Module).  
Outputs and Configuration ........................................148  
Pin Configurations for ECCP.....................................148  
PWM Mode. See PWM (ECCP Module).  
Standard PWM Mode................................................148  
Timer Resources.......................................................148  
Enhanced PWM Mode. See PWM (ECCP Module).  
Enhanced Universal Synchronous Asynchronous  
Receiver Transmitter (EUSART). See EUSART.  
Equations  
F
Fail-Safe Clock Monitor............................................. 249, 261  
Exiting Operation ...................................................... 261  
Interrupts in Power-Managed Modes........................ 262  
POR or Wake from Sleep ......................................... 262  
WDT During Oscillator Failure .................................. 261  
Fast Register Stack............................................................. 56  
Firmware Instructions........................................................ 267  
Flash Program Memory ...................................................... 73  
Associated Registers.................................................. 81  
Control Registers........................................................ 74  
EECON1 and EECON2 ...................................... 74  
TABLAT (Table Latch) Register.......................... 76  
TBLPTR (Table Pointer) Register....................... 76  
Erase Sequence ......................................................... 78  
Erasing........................................................................ 78  
Operation During Code-Protect .................................. 81  
Reading ...................................................................... 77  
Table Pointer  
Boundaries Based on Operation......................... 76  
Table Pointer Boundaries ........................................... 76  
Table Reads and Table Writes ................................... 73  
Write Sequence .......................................................... 79  
Writing To ................................................................... 79  
Protection Against Spurious Writes .................... 81  
Unexpected Termination..................................... 81  
Write Verify ......................................................... 81  
FSCM. See Fail-Safe Clock Monitor.  
A/D Acquisition Time.................................................228  
A/D Minimum Charging Time....................................228  
Calculating the Minimum Required  
Acquisition Time................................................228  
Errata.....................................................................................6  
EUSART  
Asynchronous Mode .................................................211  
12-Bit Break Transmit and Receive ..................216  
Associated Registers, Receive .........................214  
Associated Registers, Transmit ........................212  
Auto-Wake-up on Sync Break...........................214  
Receiver............................................................213  
Setting up 9-Bit Mode with  
Address Detect .........................................213  
Transmitter........................................................211  
Baud Rate Generator  
G
General Call Address Support .......................................... 184  
GOTO ............................................................................... 288  
Operation in Power-Managed Mode .................205  
Baud Rate Generator (BRG).....................................205  
Associated Registers ........................................206  
Auto-Baud Rate Detect .....................................209  
Baud Rate Error, Calculating ............................206  
Baud Rates, Asynchronous Modes...................207  
High Baud Rate Select (BRGH Bit)...................205  
Sampling ...........................................................205  
H
Hardware Multiplier............................................................. 89  
Introduction................................................................. 89  
Operation.................................................................... 89  
Performance Comparison........................................... 89  
DS39631E-page 399  
© 2008 Microchip Technology Inc.  
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