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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
External Signal ................................................. 235  
Internal Signal................................................... 235  
C
C Compilers  
Response Time......................................................... 235  
Comparator Specifications................................................ 338  
Comparator Voltage Reference........................................ 239  
Accuracy and Error................................................... 240  
Associated Registers................................................ 241  
Configuring ............................................................... 239  
Connection Considerations....................................... 240  
Effects of a Reset ..................................................... 240  
Operation During Sleep............................................ 240  
Compare (CCP Module) ................................................... 142  
Associated Registers................................................ 143  
CCPRx Register ....................................................... 142  
Pin Configuration...................................................... 142  
Software Interrupt ..................................................... 142  
Special Event Trigger ............................... 137, 142, 232  
Timer1/Timer3 Mode Selection................................. 142  
Compare (ECCP Module)................................................. 148  
Special Event Trigger ............................................... 148  
Computed GOTO................................................................ 56  
Configuration Bits ............................................................. 249  
Configuration Register Protection..................................... 266  
Context Saving During Interrupts...................................... 103  
CPFSEQ........................................................................... 284  
CPFSGT ........................................................................... 285  
CPFSLT............................................................................ 285  
Crystal Oscillator/Ceramic Resonator................................. 23  
Customer Change Notification Service............................. 407  
Customer Notification Service .......................................... 407  
Customer Support............................................................. 407  
MPLAB C18 ..............................................................318  
MPLAB C30 ..............................................................318  
CALL .................................................................................282  
CALLW..............................................................................311  
Capture (CCP Module)......................................................141  
Associated Registers ................................................143  
CCP Pin Configuration..............................................141  
CCPRxH:CCPRxL Registers ....................................141  
Prescaler...................................................................141  
Software Interrupt .....................................................141  
Timer1/Timer3 Mode Selection.................................141  
Capture (ECCP Module) ...................................................148  
Capture/Compare/PWM (CCP).........................................139  
Capture Mode. See Capture.  
CCP Mode and Timer Resources.............................140  
CCPRxH Register.....................................................140  
CCPRxL Register......................................................140  
Compare Mode. See Compare.  
Interaction of Two CCP Modules ..............................140  
Module Configuration................................................140  
Clock Sources.....................................................................28  
Selecting the 31 kHz Source.......................................29  
Selection Using OSCCON Register............................29  
CLRF.................................................................................283  
CLRWDT...........................................................................283  
Code Examples  
16 x 16 Signed Multiply Routine .................................90  
16 x 16 Unsigned Multiply Routine .............................90  
8 x 8 Signed Multiply Routine .....................................89  
8 x 8 Unsigned Multiply Routine .................................89  
Changing Between Capture Prescalers....................141  
Computed GOTO Using an Offset Value....................56  
Data EEPROM Read ..................................................85  
Data EEPROM Refresh Routine.................................86  
Data EEPROM Write ..................................................85  
Erasing a Flash Program Memory Row ......................78  
Fast Register Stack.....................................................56  
How to Clear RAM (Bank 1) Using  
D
Data Addressing Modes ..................................................... 68  
Comparing Addressing Modes with the  
Extended Instruction Set Enabled ...................... 71  
Direct .......................................................................... 68  
Indexed Literal Offset ................................................. 70  
Instructions Affected........................................... 70  
Indirect........................................................................ 68  
Inherent and Literal..................................................... 68  
Data EEPROM  
Indirect Addressing .............................................68  
Implementing a Real-Time Clock Using  
Code Protection........................................................ 266  
Data EEPROM Memory...................................................... 83  
Associated Registers.................................................. 87  
EEADR Register......................................................... 83  
EECON1 and EECON2 Registers.............................. 83  
Operation During Code-Protect .................................. 86  
Protection Against Spurious Write.............................. 86  
Reading ...................................................................... 85  
Using .......................................................................... 86  
Write Verify................................................................. 85  
Writing ........................................................................ 85  
Data Memory ...................................................................... 59  
Access Bank............................................................... 62  
and the Extended Instruction Set ............................... 70  
Bank Select Register (BSR) ....................................... 59  
General Purpose Registers ........................................ 62  
Map for PIC18F2420/4420 ......................................... 60  
Map for PIC18F2520/4520 ......................................... 61  
Special Function Registers......................................... 63  
DAW ................................................................................. 286  
DC and AC Characteristics  
a Timer1 Interrupt Service ................................131  
Initializing PORTA.....................................................105  
Initializing PORTB.....................................................108  
Initializing PORTC.....................................................111  
Initializing PORTD.....................................................114  
Initializing PORTE.....................................................117  
Loading the SSPBUF (SSPSR) Register..................164  
Reading a Flash Program Memory Word ...................77  
Saving STATUS, WREG and BSR  
Registers in RAM..............................................103  
Writing to Flash Program Memory ........................80–81  
Code Protection ................................................................249  
COMF................................................................................284  
Comparator .......................................................................233  
Analog Input Connection Considerations..................237  
Associated Registers ................................................237  
Configuration.............................................................234  
Effects of a Reset......................................................236  
Interrupts...................................................................236  
Operation ..................................................................235  
Operation During Sleep ............................................236  
Outputs .....................................................................235  
Reference .................................................................235  
Graphs and Tables ................................................... 361  
DS39631E-page 398  
© 2008 Microchip Technology Inc.  
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