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PIC18F4580-I/PT 参数 Datasheet PDF下载

PIC18F4580-I/PT图片预览
型号: PIC18F4580-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与ECAN技术, 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 490 页 / 8912 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2480/2580/4480/4580  
24.2.5  
CAN MODULE I/O CONTROL  
REGISTER  
This register controls the operation of the CAN module’s  
I/O pins in relation to the rest of the microcontroller.  
REGISTER 24-55: CIOCON: CAN I/O CONTROL REGISTER  
U-0  
U-0  
R/W-0  
ENDRHI(1)  
R/W-0  
U-0  
U-0  
U-0  
U-0  
CANCAP  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-6  
bit 5  
Unimplemented: Read as ‘0’  
ENDRHI: Enable Drive High bit(1)  
1= CANTX pin will drive VDD when recessive  
0= CANTX pin will be tri-state when recessive  
bit 4  
CANCAP: CAN Message Receive Capture Enable bit  
1= Enable CAN capture, CAN message receive signal replaces input on RC2/CCP1  
0= Disable CAN capture, RC2/CCP1 input to CCP1 module  
bit 3-0  
Unimplemented: Read as ‘0’  
Note 1: Always set this bit when using a differential bus to avoid signal crosstalk in CANTX from other nearby pins.  
DS39637D-page 320  
© 2009 Microchip Technology Inc.  
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