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PIC18F4580-I/PT 参数 Datasheet PDF下载

PIC18F4580-I/PT图片预览
型号: PIC18F4580-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与ECAN技术, 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 490 页 / 8912 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2480/2580/4480/4580  
2.3  
Master Clear (MCLR) Pin  
2.4  
ICSP Pins  
The MCLR pin provides two specific device  
functions: Device Reset, and Device Programming  
and Debugging. If programming and debugging are  
The PGC and PGD pins are used for In-Circuit Serial  
Programming™ (ICSP™) and debugging purposes. It  
is recommended to keep the trace length between the  
ICSP connector and the ICSP pins on the device as  
short as possible. If the ICSP connector is expected to  
experience an ESD event, a series resistor is recom-  
mended, with the value in the range of a few tens of  
ohms, not to exceed 100.  
not required in the end application,  
a
direct  
connection to VDD may be all that is required. The  
addition of other components, to help increase the  
application’s resistance to spurious Resets from  
voltage sags, may be beneficial.  
A
typical  
configuration is shown in Figure 2-1. Other circuit  
designs may be implemented, depending on the  
application’s requirements.  
Pull-up resistors, series diodes, and capacitors on the  
PGC and PGD pins are not recommended as they will  
interfere with the programmer/debugger communica-  
tions to the device. If such discrete components are an  
application requirement, they should be removed from  
the circuit during programming and debugging. Alter-  
natively, refer to the AC/DC characteristics and timing  
requirements information in the respective device  
Flash programming specification for information on  
capacitive loading limits and pin input voltage high (VIH)  
and input low (VIL) requirements.  
During programming and debugging, the resistance  
and capacitance that can be added to the pin must be  
considered. Device programmers and debuggers drive  
the MCLR pin. Consequently, specific voltage levels  
(VIH and VIL) and fast signal transitions must not be  
adversely affected. Therefore, specific values of R1  
and C1 will need to be adjusted based on the  
application and PCB requirements. For example, it is  
recommended that the capacitor, C1, be isolated from  
the MCLR pin during programming and debugging  
operations by using a jumper (Figure 2-2). The jumper  
is replaced for normal run-time operations.  
For device emulation, ensure that the “Communication  
Channel Select” (i.e., PGCx/PGDx pins) programmed  
into the device matches the physical connections for  
the ICSP to the Microchip debugger/emulator tool.  
Any components associated with the MCLR pin  
should be placed within 0.25 inch (6 mm) of the pin.  
For more information on available Microchip  
development tools connection requirements, refer to  
Section 27.0 “Development Support”.  
FIGURE 2-2:  
EXAMPLE OF MCLR PIN  
CONNECTIONS  
VDD  
R1  
R2  
MCLR  
PIC18FXXXX  
JP  
C1  
Note 1: R1 10 kΩ is recommended. A suggested  
starting value is 10 kΩ. Ensure that the  
MCLR pin VIH and VIL specifications are met.  
2: R2 470Ω will limit any current flowing into  
MCLR from the external capacitor, C, in the  
event of MCLR pin breakdown, due to  
Electrostatic Discharge (ESD) or Electrical  
Overstress (EOS). Ensure that the MCLR pin  
VIH and VIL specifications are met.  
© 2009 Microchip Technology Inc.  
DS39637D-page 27  
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