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PIC18F4580-I/PT 参数 Datasheet PDF下载

PIC18F4580-I/PT图片预览
型号: PIC18F4580-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与ECAN技术, 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 490 页 / 8912 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2480/2580/4480/4580  
FIGURE 2-1:  
RECOMMENDED  
MINIMUM CONNECTIONS  
2.0  
2.1  
GUIDELINES FOR GETTING  
STARTED WITH PIC18F  
MICROCONTROLLERS  
(1)  
C2  
VDD  
Basic Connection Requirements  
Getting started with the PIC18F2480/2580/4480/4580  
family of 8-bit microcontrollers requires attention to a  
minimal set of device pin connections before  
proceeding with development.  
R1  
R2  
MCLR  
VDD  
C1  
(1)  
The following pins must always be connected:  
PIC18FXXXX  
C3  
VSS  
• All VDD and VSS pins  
VSS  
VDD  
(see Section 2.2 “Power Supply Pins”)  
(1)  
C6  
• All AVDD and AVSS pins, regardless of whether or  
not the analog device features are used  
(see Section 2.2 “Power Supply Pins”)  
• MCLR pin  
(see Section 2.3 “Master Clear (MCLR) Pin”)  
(1)  
(1)  
C4  
C5  
These pins must also be connected if they are being  
used in the end application:  
• PGC/PGD pins used for In-Circuit Serial  
Programming™ (ICSP™) and debugging purposes  
(see Section 2.4 “ICSP Pins”)  
Key (all values are recommendations):  
C1 through C6: 0.1 µF, 20V ceramic  
R1: 10 k  
• OSCI and OSCO pins when an external oscillator  
source is used  
(see Section 2.5 “External Oscillator Pins”)  
R2: 100to 470Ω  
Note 1: The example shown is for a PIC18F device  
with five VDD/VSS and AVDD/AVSS pairs.  
Other devices may have more or less pairs;  
adjust the number of decoupling capacitors  
appropriately.  
Additionally, the following pins may be required:  
• VREF+/VREF- pins are used when external voltage  
reference for analog modules is implemented  
Note:  
The AVDD and AVSS pins must always be  
connected, regardless of whether any of  
the analog modules are being used.  
The minimum mandatory connections are shown in  
Figure 2-1.  
© 2009 Microchip Technology Inc.  
DS39637D-page 25  
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