PIC18F2420/2520/4420/4520
6.0
FLASH PROGRAM MEMORY
6.1
Table Reads and Table Writes
The Flash program memory is readable, writable and
erasable during normal operation over the entire V
DD
range.
A read from program memory is executed on one byte
at a time. A write to program memory is executed on
blocks of 32 bytes at a time. Program memory is
erased in blocks of 64 bytes at a time. A bulk erase
operation may not be issued from user code.
Writing or erasing program memory will cease
instruction fetches until the operation is complete. The
program memory cannot be accessed during the write
or erase, therefore, code cannot execute. An internal
programming timer terminates program memory writes
and erases.
A value written to program memory does not need to be
a valid instruction. Executing a program memory
location that forms an invalid instruction results in a
NOP.
In order to read and write program memory, there are
two operations that allow the processor to move bytes
between the program memory space and the data RAM:
• Table Read (TBLRD)
• Table Write (TBLWT)
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
Table read operations retrieve data from program
memory and places it into the data RAM space.
program memory and data RAM.
Table write operations store data from the data memory
space into holding registers in program memory. The
procedure to write the contents of the holding registers
into program memory is detailed in
operation of a table write with program memory and data
RAM.
Table operations work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word aligned. Therefore, a table block can
start and end at any byte address. If a table write is being
used to write executable code into program memory,
program instructions will need to be word aligned.
FIGURE 6-1:
TABLE READ OPERATION
Instruction:
TBLRD*
Table Pointer
(1)
TBLPTRU
TBLPTRH
TBLPTRL
Program Memory
Table Latch (8-bit)
TABLAT
Program Memory
(TBLPTR)
Note 1:
The Table Pointer register points to a byte in program memory.
©
2008 Microchip Technology Inc.
DS39631E-page 73
MICROCHIP [ MICROCHIP TECHNOLOGY ]
