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PIC18F4520-I/PT 参数 Datasheet PDF下载

PIC18F4520-I/PT图片预览
型号: PIC18F4520-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
It is recommended that only BCF, BSF, SWAPF, MOVFF  
and MOVWFinstructions are used to alter the STATUS  
register, because these instructions do not affect the Z,  
C, DC, OV or N bits in the STATUS register.  
5.3.5  
STATUS REGISTER  
The STATUS register, shown in Register 5-2, contains  
the arithmetic status of the ALU. As with any other SFR,  
it can be the operand for any instruction.  
For other instructions that do not affect Status bits, see  
the instruction set summaries in Table 24-2 and  
Table 24-3.  
If the STATUS register is the destination for an instruc-  
tion that affects the Z, DC, C, OV or N bits, the results  
of the instruction are not written; instead, the STATUS  
register is updated according to the instruction per-  
formed. Therefore, the result of an instruction with the  
STATUS register as its destination may be different  
than intended. As an example, CLRF STATUSwill set  
the Z bit and leave the remaining Status bits  
unchanged (‘000u u1uu’).  
Note:  
The C and DC bits operate as the borrow  
and digit borrow bits, respectively, in  
subtraction.  
REGISTER 5-2:  
STATUS REGISTER  
U-0  
U-0  
U-0  
R/W-x  
N
R/W-x  
OV  
R/W-x  
Z
R/W-x  
DC(1)  
R/W-x  
C(2)  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-5  
bit 4  
Unimplemented: Read as ‘0’  
N: Negative bit  
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was negative  
(ALU MSB = 1).  
1= Result was negative  
0= Result was positive  
bit 3  
OV: Overflow bit  
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit magnitude  
which causes the sign bit (bit 7) to change state.  
1= Overflow occurred for signed arithmetic (in this arithmetic operation)  
0= No overflow occurred  
bit 2  
bit 1  
Z: Zero bit  
1= The result of an arithmetic or logic operation is zero  
0= The result of an arithmetic or logic operation is not zero  
DC: Digit Carry/borrow bit(1)  
For ADDWF, ADDLW, SUBLWand SUBWFinstructions:  
1= A carry-out from the 4th low-order bit of the result occurred  
0= No carry-out from the 4th low-order bit of the result  
bit 0  
C: Carry/borrow bit(2)  
For ADDWF, ADDLW, SUBLWand SUBWFinstructions:  
1= A carry-out from the Most Significant bit of the result occurred  
0= No carry-out from the Most Significant bit of the result occurred  
Note 1: For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second  
operand. For rotate (RRF, RLF) instructions, this bit is loaded with either bit 4 or bit 3 of the source register.  
2: For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second  
operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low-order bit of the  
source register.  
© 2008 Microchip Technology Inc.  
DS39631E-page 67  
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