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PIC18F4520-I/P 参数 Datasheet PDF下载

PIC18F4520-I/P图片预览
型号: PIC18F4520-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
FIGURE 5-9:  
COMPARING ADDRESSING OPTIONS FOR BIT-ORIENTED AND  
BYTE-ORIENTED INSTRUCTIONS (EXTENDED INSTRUCTION SET ENABLED)  
EXAMPLE INSTRUCTION: ADDWF, f, d, a (Opcode: 0010 01da ffff ffff)  
000h  
When ‘a’ = 0 and f 60h:  
The instruction executes in  
Direct Forced mode. ‘f’ is inter-  
060h  
080h  
Bank 0  
preted as a location in the  
Access RAM between 060h  
and 0FFh. This is the same as  
locations 060h to 07Fh  
(Bank 0) and F80h to FFFh  
(Bank 15) of data memory.  
100h  
00h  
Bank 1  
through  
Bank 14  
60h  
80h  
Valid range  
for ‘f’  
FFh  
F00h  
Access RAM  
Locations below 60h are not  
available in this addressing  
mode.  
Bank 15  
SFRs  
F80h  
FFFh  
Data Memory  
When ‘a’ = 0 and f 5Fh:  
000h  
080h  
100h  
Bank 0  
The instruction executes in  
Indexed Literal Offset mode. ‘f’  
is interpreted as an offset to the  
address value in FSR2. The  
two are added together to  
obtain the address of the target  
register for the instruction. The  
address can be anywhere in  
the data memory space.  
001001da ffffffff  
Bank 1  
through  
Bank 14  
FSR2H  
FSR2L  
F00h  
F80h  
Note that in this mode, the  
correct syntax is now:  
ADDWF [k], d  
Bank 15  
SFRs  
where ‘k’ is the same as ‘f’.  
FFFh  
Data Memory  
BSR  
000h  
080h  
100h  
00000000  
When ‘a’ = 1 (all values of f):  
Bank 0  
The instruction executes in  
Direct mode (also known as  
Direct Long mode). ‘f’ is inter-  
preted as a location in one of  
the 16 banks of the data  
memory space. The bank is  
designated by the Bank Select  
Register (BSR). The address  
can be in any implemented  
bank in the data memory  
space.  
001001da ffffffff  
Bank 1  
through  
Bank 14  
F00h  
F80h  
Bank 15  
SFRs  
FFFh  
Data Memory  
© 2008 Microchip Technology Inc.  
DS39631E-page 71  
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