PIC18F45J10 FAMILY
TABLE 1-2:
PIC18F24J10/25J10 PINOUT I/O DESCRIPTIONS
Pin Number
Pin Buffer
Type Type
SPDIP,
SOIC, QFN
SSOP
Pin Name
Description
MCLR
MCLR
1
26
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
I
ST
OSC1/CLKI
OSC1
9
6
Oscillator crystal or external clock input.
I
I
—
CMOS
Oscillator crystal input or external clock source input.
External clock source input. Always associated with pin
function OSC1. See related OSC2/CLKO pins.
CLKI
OSC2/CLKO
OSC2
10
7
Oscillator crystal or clock output.
O
O
—
—
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In EC mode, OSC2 pin outputs CLKO which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
CLKO
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
DS39682E-page 12
© 2009 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
