PIC18F2450/4450
TABLE 2-3:
OSCILLATOR CONFIGURATION OPTIONS FOR USB OPERATION (CONTINUED)
Input Oscillator
Frequency
PLL Division
(PLLDIV2:PLLDIV0)
Clock Mode
(FOSC3:FOSC0)
MCU Clock Division
(CPUDIV1:CPUDIV0)
Microcontroller
Clock Frequency
12 MHz
÷3 (010)
÷2 (001)
÷1 (000)
HS, EC, ECIO
HSPLL, ECPLL, ECPIO
HS, EC, ECIO
None (00)
÷2 (01)
÷3 (10)
÷4 (11)
÷2 (00)
÷3 (01)
÷4 (10)
÷6 (11)
None (00)
÷2 (01)
÷3 (10)
÷4 (11)
÷2 (00)
÷3 (01)
÷4 (10)
÷6 (11)
None (00)
÷2 (01)
÷3 (10)
÷4 (11)
÷2 (00)
÷3 (01)
÷4 (10)
÷6 (11)
12 MHz
6 MHz
4 MHz
3 MHz
48 MHz
32 MHz
24 MHz
16 MHz
8 MHz
8 MHz
4 MHz
2.67 MHz
2 MHz
HSPLL, ECPLL, ECPIO
XT, HS, EC, ECIO
48 MHz
32 MHz
24 MHz
16 MHz
4 MHz
4 MHz
2 MHz
1.33 MHz
1 MHz
HSPLL, ECPLL, XTPLL,
ECPIO
48 MHz
32 MHz
24 MHz
16 MHz
Legend:
All clock frequencies, except 24 MHz, are exclusively associated with full-speed USB operation (USB clock of 48 MHz).
Bold is used to highlight clock selections that are compatible with low-speed USB operation (system clock of 24 MHz,
USB clock of 6 MHz).
Note 1: Only valid when the USBDIV Configuration bit is cleared.
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 29
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