PIC18F2450/4450
10.3.1
SWITCHING PRESCALER
ASSIGNMENT
10.3 Prescaler
An 8-bit counter is available as a prescaler for the Timer0
module. The prescaler is not directly readable or writable;
its value is set by the PSA and T0PS2:T0PS0 bits
(T0CON<3:0>) which determine the prescaler
assignment and prescale ratio.
The prescaler assignment is fully under software
control and can be changed “on-the-fly” during program
execution.
10.4 Timer0 Interrupt
Clearing the PSA bit assigns the prescaler to the
Timer0 module. When it is assigned, prescale values
from 1:2 through 1:256, in power-of-2 increments, are
selectable.
The TMR0 interrupt is generated when the TMR0
register overflows from FFh to 00h in 8-Bit mode, or
from FFFFh to 0000h in 16-Bit mode. This overflow
sets the TMR0IF flag bit. The interrupt can be masked
by clearing the TMR0IE bit (INTCON<5>). Before re-
enabling the interrupt, the TMR0IF bit must be cleared
in software by the Interrupt Service Routine.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF TMR0, MOVWF
TMR0, BSF TMR0,etc.) clear the prescaler count.
Note:
Writing to TMR0 when the prescaler is
assigned to Timer0 will clear the prescaler
count but will not change the prescaler
assignment.
Since Timer0 is shut down in Sleep mode, the TMR0
interrupt cannot awaken the processor from Sleep.
TABLE 10-1: REGISTERS ASSOCIATED WITH TIMER0
Reset
Values
on page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TMR0L
Timer0 Register Low Byte
Timer0 Register High Byte
50
50
49
50
51
TMR0H
INTCON
T0CON
TRISA
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
T0SE
RBIE
PSA
TMR0IF
T0PS2
INT0IF
T0PS1
TRISA1
RBIF
T0PS0
TRISA0
TMR0ON
—
T08BIT
TRISA6(1) TRISA5
T0CS
TRISA4
TRISA3
TRISA2
Legend: — = unimplemented locations, read as ‘0’. Shaded cells are not used by Timer0.
Note 1: RA6 is configured as a port pin based on various primary oscillator modes. When the port pin is disabled,
all of the associated bits read ‘0’.
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 113