PIC18F2420/2520/4420/4520
26.4.3
TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 26-6:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
1
Q2
Q3
Q4
Q1
OSC1
CLKO
3
4
3
4
2
TABLE 26-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
Symbol
Characteristic
Min
Max
Units
Conditions
No.
1A
FOSC
External CLKI Frequency(1)
DC
DC
DC
DC
DC
0.1
4
1
25
31.25
40
4
MHz XT, RC Oscillator mode
MHz HS Oscillator mode
kHz LP Oscillator mode
MHz EC Oscillator mode
MHz RC Oscillator mode
MHz XT Oscillator mode
MHz HS Oscillator mode
MHz HS + PLL Oscillator mode
kHz LP Oscillator mode
Oscillator Frequency(1)
4
25
10
200
—
4
5
1
TOSC
External CLKI Period(1)
Oscillator Period(1)
1000
40
ns
ns
μs
ns
ns
μs
ns
ns
μs
ns
ns
ns
μs
ns
ns
ns
ns
XT, RC Oscillator mode
HS Oscillator mode
LP Oscillator mode
EC Oscillator mode
RC Oscillator mode
XT Oscillator mode
HS Oscillator mode
HS + PLL Oscillator mode
LP Oscillator mode
TCY = 4/FOSC, Industrial
TCY = 4/FOSC, Extended
XT Oscillator mode
LP Oscillator mode
HS Oscillator mode
XT Oscillator mode
LP Oscillator mode
HS Oscillator mode
—
32
—
25
—
250
0.25
40
—
10
250
250
200
—
100
5
2
3
TCY
Instruction Cycle Time(1)
100
160
30
—
TOSL,
TOSH
External Clock in (OSC1)
High or Low Time
—
2.5
10
—
—
4
TOSR,
TOSF
External Clock in (OSC1)
Rise or Fall Time
—
20
50
7.5
—
—
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
DS39631E-page 342
© 2008 Microchip Technology Inc.
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