PIC18F45J10 FAMILY
EXAMPLE 7-3:
WRITING TO FLASH PROGRAM MEMORY
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
; Load TBLPTR with the base
; address of the memory block
ERASE_BLOCK
BSF
BSF
BCF
EECON1, WREN
EECON1, FREE
INTCON, GIE
55h
EECON2
0AAh
; enable write to memory
; enable Erase operation
; disable interrupts
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
MOVLW
MOVWF
; write 55h
EECON2
; write 0AAh
; start erase (CPU stall)
; re-enable interrupts
EECON1, WR
INTCON, GIE
D'16'
WRITE_COUNTER
; Need to write 16 blocks of 64 to write
; one erase block of 1024
RESTART_BUFFER
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
D'64'
COUNTER
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
; point to buffer
FILL_BUFFER
...
; read the new data from I2C, SPI,
; PSP, USART, etc.
WRITE_BUFFER
MOVLW
MOVWF
D’64'
COUNTER
; number of bytes in holding register
WRITE_BYTE_TO_HREGS
MOVFF
MOVWF
TBLWT+*
POSTINC0, WREG
TABLAT
; get low byte of buffer data
; present data to table latch
; write data, perform a short write
; to internal TBLWT holding register.
; loop until buffers are full
DECFSZ COUNTER
BRA WRITE_BYTE_TO_HREGS
PROGRAM_MEMORY
BSF
BCF
EECON1, WREN
INTCON, GIE
55h
EECON2
0AAh
; enable write to memory
; disable interrupts
MOVLW
MOVWF
MOVLW
MOVWF
BSF
Required
Sequence
; write 55h
EECON2
; write 0AAh
EECON1, WR
INTCON, GIE
EECON1, WREN
; start program (CPU stall)
; re-enable interrupts
; disable write to memory
BSF
BCF
DECFSZ WRITE_COUNTER
BRA RESTART_BUFFER
; done with one write cycle
; if not done replacing the erase block
DS39682E-page 78
© 2009 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
