PIC18F45J10 FAMILY
14.2.3
CCP PRESCALER
14.2 Capture Mode
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
CCP module is turned off or Capture mode is disabled,
the prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 register when an
event occurs on the corresponding CCPx pin. An event
is defined as one of the following:
• every falling edge
• every rising edge
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
• every 4th rising edge
• every 16th rising edge
a
non-zero prescaler. Example 14-1 shows the
The event is selected by the mode select bits,
CCPxM<3:0> (CCPxCON<3:0>). When a capture is
made, the interrupt request flag bit, CCPxIF, is set; it
must be cleared in software. If another capture occurs
before the value in register CCPRx is read, the old
captured value is overwritten by the new captured value.
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 14-1:
CHANGING BETWEEN
CAPTURE PRESCALERS
(CCP2 SHOWN)
14.2.1
CCP PIN CONFIGURATION
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
CLRF
CCP2CON
; Turn CCP module off
MOVLW NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and CCP ON
; Load CCP2CON with
; this value
Note:
If RB3/CCP2 or RC1/CCP2 is configured
as an output, a write to the port can cause
a capture condition.
MOVWF CCP2CON
14.2.2
SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false inter-
rupts. The interrupt flag bit, CCPxIF, should also be
cleared following any such change in operating mode.
FIGURE 14-1:
CAPTURE MODE OPERATION BLOCK DIAGRAM
Set CCP1IF
CCPR1H
CCPR1L
TMR1L
CCP1 pin
Prescaler
÷ 1, 4, 16
and
Edge Detect
TMR1H
4
4
CCP1CON<3:0>
Q1:Q4
Set CCP2IF
4
CCP2CON<3:0>
CCPR2H
TMR1H
CCPR2L
TMR1L
CCP2 pin
Prescaler
÷ 1, 4, 16
and
Edge Detect
© 2009 Microchip Technology Inc.
DS39682E-page 129
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