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PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
FIGURE 22-2:  
LOW VOLTAGE DETECT (LVD) BLOCK DIAGRAM  
VDD  
LVDIN  
LVD3:LVD0  
LVDCON  
Register  
LVDIF  
Internally Generated  
Reference Voltage  
(Parameter #D423)  
LVDEN  
The LVD module has an additional feature that allows  
the user to supply the trip voltage to the module from  
an external source. This mode is enabled when bits  
LVDL3:LVDL0 are set to ‘1111’. In this state, the com-  
parator input is multiplexed from the external input pin,  
LVDIN (Figure 22-3). This gives users flexibility,  
because it allows them to configure the Low Voltage  
Detect interrupt to occur at any voltage in the valid  
operating range.  
FIGURE 22-3:  
LOW VOLTAGE DETECT (LVD) WITH EXTERNAL INPUT BLOCK DIAGRAM  
VDD  
VDD  
LVD3:LVD0  
LVDCON  
Register  
LVDIN  
LVDEN  
Externally Generated  
Trip Point  
LVD  
VxEN  
BODEN  
EN  
BGAP  
DS39609A-page 234  
Advance Information  
2003 Microchip Technology Inc.  
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