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PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
FIGURE 21-1:  
VOLTAGE REFERENCE BLOCK DIAGRAM  
VDD  
VREF+  
16 Stages  
CVRSS = 1  
8R  
CVRSS = 0  
CVREN  
R
R
R
R
CVRR  
CVRSS = 0  
8R  
CVRSS = 1  
VREF-  
CVR3  
CVREF  
(From CVRCON<3:0>)  
CVR0  
16-1 Analog Mux  
Note: R is defined in Section 26.0.  
21.2 Voltage Reference Accuracy/Error  
21.4 Effects of a RESET  
The full range of voltage reference cannot be realized  
due to the construction of the module. The transistors  
on the top and bottom of the resistor ladder network  
(Figure 21-1) keep CVREF from approaching the refer-  
ence source rails. The voltage reference is derived  
from the reference source; therefore, the CVREF output  
changes with fluctuations in that source. The tested  
absolute accuracy of the voltage reference can be  
found in Section 26.0.  
A device RESET disables the voltage reference by  
clearing bit CVREN (CVRCON<7>). This RESET also  
disconnects the reference from the RA2 pin by clearing  
bit CVROE (CVRCON<6>) and selects the high volt-  
age range by clearing bit CVRR (CVRCON<5>). The  
VRSS value select bits, CVRCON<3:0>, are also  
cleared.  
21.5 Connection Considerations  
The voltage reference module operates independently  
of the comparator module. The output of the reference  
generator may be connected to the RF5 pin if the  
TRISF<5> bit is set and the CVROE bit is set. Enabling  
the voltage reference output onto the RF5 pin, with an  
input signal present, will increase current consumption.  
Connecting RF5 as a digital output with VRSS enabled  
will also increase current consumption.  
21.3 Operation During SLEEP  
When the device wakes up from SLEEP through an  
interrupt or a Watchdog Timer time-out, the contents of  
the CVRCON register are not affected. To minimize  
current consumption in SLEEP mode, the voltage  
reference should be disabled.  
The RF5 pin can be used as a simple D/A output with  
limited drive capability. Due to the limited current drive  
capability, a buffer must be used on the voltage refer-  
ence output for external connections to VREF.  
Figure 21-2 shows an example buffering technique.  
DS39609A-page 230  
Advance Information  
2003 Microchip Technology Inc.