PIC18FXX20
22.1 Control Register
The Low Voltage Detect Control register controls the
operation of the Low Voltage Detect circuitry.
REGISTER 22-1: LVDCON REGISTER
U-0
—
U-0
—
R-0
IRVST
R/W-0
LVDEN
R/W-0
LVDL3
R/W-1
LVDL2
R/W-0
LVDL1
R/W-1
LVDL0
bit 7
bit 0
bit 7-6
bit 5
Unimplemented: Read as '0'
IRVST: Internal Reference Voltage Stable Flag bit
1= Indicates that the Low Voltage Detect logic will generate the interrupt flag at the
specified voltage range
0= Indicates that the Low Voltage Detect logic will not generate the interrupt flag at the
specified voltage range and the LVD interrupt should not be enabled
bit 4
LVDEN: Low Voltage Detect Power Enable bit
1= Enables LVD, powers up LVD circuit
0= Disables LVD, powers down LVD circuit
bit 3-0
LVDL3:LVDL0: Low Voltage Detection Limit bits
1111= External analog input is used (input comes from the LVDIN pin)
1110= 4.5V - 4.77V
1101= 4.2V - 4.45V
1100= 4.0V - 4.24V
1011= 3.8V - 4.03V
1010= 3.6V - 3.82V
1001= 3.5V - 3.71V
1000= 3.3V - 3.50V
0111= 3.0V - 3.18V
0110= 2.8V - 2.97V
0101= 2.7V - 2.86V
0100= 2.5V - 2.65V
0011= 2.4V - 2.54V
0010= 2.2V - 2.33V
0001= 2.0V - 2.12V
0000= Reserved
Note:
LVDL3:LVDL0 modes, which result in a trip point below the valid operating voltage
of the device, are not tested.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 235
MICROCHIP [ MICROCHIP ]
