欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F8620-I/PT的Datasheet PDF文件第166页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第167页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第168页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第169页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第171页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第172页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第173页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第174页  
PIC18FXX20  
REGISTER 17-4: SSPCON1: MSSP CONTROL REGISTER1 (I2C MODE)  
R/W-0  
WCOL  
R/W-0  
SSPOV  
R/W-0  
SSPEN  
R/W-0  
CKP  
R/W-0  
SSPM3  
R/W-0  
SSPM2  
R/W-0  
SSPM1  
R/W-0  
SSPM0  
bit 7  
bit 0  
bit 7  
WCOL: Write Collision Detect bit  
In Master Transmit mode:  
1= A write to the SSPBUF register was attempted while the I2C conditions were not valid for  
a transmission to be started (must be cleared in software)  
0= No collision  
In Slave Transmit mode:  
1= The SSPBUF register is written while it is still transmitting the previous word (must be  
cleared in software)  
0= No collision  
In Receive mode (Master or Slave modes):  
This is a “don’t care” bit  
bit 6  
SSPOV: Receive Overflow Indicator bit  
In Receive mode:  
1= A byte is received while the SSPBUF register is still holding the previous byte (must  
be cleared in software)  
0= No overflow  
In Transmit mode:  
This is a “don’t care” bit in Transmit mode  
bit 5  
bit 4  
SSPEN: Synchronous Serial Port Enable bit  
1= Enables the serial port and configures the SDA and SCL pins as the serial port pins  
0= Disables serial port and configures these pins as I/O port pins  
Note:  
When enabled, the SDA and SCL pins must be properly configured as input or output.  
CKP: SCK Release Control bit  
In Slave mode:  
1= Release clock  
0= Holds clock low (clock stretch), used to ensure data setup time  
In Master mode:  
Unused in this mode  
bit 3-0 SSPM3:SSPM0: Synchronous Serial Port Mode Select bits  
1111= I2C Slave mode, 10-bit address with START and STOP bit interrupts enabled  
1110= I2C Slave mode, 7-bit address with START and STOP bit interrupts enabled  
1011= I2C Firmware Controlled Master mode (Slave IDLE)  
1000= I2C Master mode, clock = FOSC / (4 * (SSPADD+1))  
0111= I2C Slave mode, 10-bit address  
0110= I2C Slave mode, 7-bit address  
Note:  
Bit combinations not specifically listed here are either reserved, or implemented in  
SPI mode only.  
Legend:  
R = Readable bit  
- n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
DS39609A-page 168  
Advance Information  
2003 Microchip Technology Inc.  
 复制成功!