PIC18FXX20
FIGURE 26-24:
USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX1/CK1
pin
121
121
RC7/RX1/DT1
pin
120
Refer to Figure 26-6 for load conditions.
122
Note:
TABLE 26-23: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param.
Symbol
Characteristic
Min
Max
Units Conditions
No.
120
TckH2dtV SYNC XMIT (MASTER & SLAVE)
Clock high to data out valid
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
—
—
—
—
—
—
40
100
20
50
20
ns
ns
ns
ns
ns
ns
121
122
Tckrf
Tdtrf
Clock out rise time and fall time
(Master mode)
Data out rise time and fall time
50
FIGURE 26-25:
USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX1/CK1
pin
125
RC7/RX1/DT1
pin
126
Note: Refer to Figure 26-6 for load conditions.
TABLE 26-24: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
Symbol
Characteristic
Min
Max
Units
Conditions
No.
125
TdtV2ckl SYNC RCV (MASTER & SLAVE)
Data hold before CK ↓ (DT hold time)
10
15
—
—
ns
ns
126
TckL2dtl
Data hold after CK ↓ (DT hold time)
DS39609A-page 338
Advance Information
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
