PIC18F6525/6621/8525/8621
18.3 SPI Mode
18.0 MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported. To accomplish
communication, typically three pins are used:
18.1 Master SSP (MSSP) Module
Overview
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDI/SDA
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RF7/SS
Figure 18-1 shows the block diagram of the MSSP
module when operating in SPI mode.
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I2C)
- Full Master mode
FIGURE 18-1:
MSSP BLOCK DIAGRAM
(SPI™ MODE)
- Slave mode (with general address call)
The I2C interface supports the following modes in
hardware:
Internal
Data Bus
Read
Write
• Master mode
• Multi-Master mode
• Slave mode
SSPBUF reg
SSPSR reg
18.2 Control Registers
RC4/SDI/SDA
RC5/SDO
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON1 and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly depending on whether the MSSP
module is operated in SPI or I2C mode.
Shift
Clock
bit 0
RF7/SS
Control
Enable
SS
Additional details are provided under the individual
sections.
Edge
Select
2
Clock Select
SSPM3:SSPM0
SMP:CKE
2
4
TMR2 Output
RC3/SCK/
SCL
(
)
2
Edge
Select
TOSC
Prescaler
4, 16, 64
Data to TXx/RXx in SSPSR
TRIS bit
2005 Microchip Technology Inc.
DS39612B-page 173