PIC18F6525/6621/8525/8621
FIGURE 11-1:
TIMER0 BLOCK DIAGRAM IN 8-BIT MODE
Data Bus
FOSC/4
0
1
8
1
0
Sync with
Internal
Clocks
TMR0
T0CKI pin
Programmable
Prescaler
(2 TCY Delay)
T0SE
3
PSA
Set Interrupt
Flag bit TMR0IF
on Overflow
T0PS2, T0PS1, T0PS0
T0CS
Note:
Upon Reset, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
FIGURE 11-2:
TIMER0 BLOCK DIAGRAM IN 16-BIT MODE
FOSC/4
0
1
Sync with
Set Interrupt
Flag bit TMR0IF
on Overflow
TMR0
High Byte
Internal
TMR0L
1
Clocks
Programmable
T0CKI pin
0
8
Prescaler
(2 TCY Delay)
T0SE
3
Read TMR0L
Write TMR0L
PSA
T0PS2, T0PS1, T0PS0
T0CS
8
8
TMR0H
8
Data Bus<7:0>
Note:
Upon Reset, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
DS39612B-page 132
2005 Microchip Technology Inc.