PIC18F6585/8585/6680/8680
TABLE 1-2:
PIC18F6585/8585/6680/8680 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin
Type
Buffer
Type
Pin Name
PIC18F6X8X PIC18F8X8X
Description
TQFP PLCC
TQFP
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
24
23
22
34
33
32
30
I/O
I
TTL
Analog
Digital I/O.
Analog input 0.
AN0
RA1/AN1
RA1
29
28
I/O
I
TTL
Analog
Digital I/O.
Analog input 1.
AN1
RA2/AN2/VREF-
RA2
I/O
TTL
Digital I/O.
AN2
VREF-
I
I
Analog
Analog
Analog input 2.
A/D reference voltage (Low) input.
RA3/AN3/VREF+
RA3
21
28
27
31
39
38
27
34
33
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog input 3.
A/D reference voltage (High) input.
AN3
VREF+
RA4/T0CKI
RA4
I/O
I
ST/OD
ST
Digital I/O – Open-drain when
configured as output.
Timer0 external clock input.
T0CKI
RA5/AN4/LVDIN
RA5
I/O
TTL
Digital I/O.
AN4
LVDIN
I
I
Analog
Analog
Analog input 4.
Low-voltage detect input.
RA6
See the OSC2/CLKO/RA6 pin.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
Analog = Analog input
ST
I
= Schmitt Trigger input with CMOS levels
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 in all operating modes except Microcontroller – applies to PIC18F8X8X only.
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X8X devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode; otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X8X (80-pin) devices.
6: PSP is available in Microcontroller mode only.
7: On PIC18F8X8X devices, these pins can be multiplexed with RH7/RH6 by changing the ECCPMX
configuration bit.
2004 Microchip Technology Inc.
DS30491C-page 13