PIC18F6585/8585/6680/8680
TABLE 1-2:
PIC18F6585/8585/6680/8680 PINOUT I/O DESCRIPTIONS
Pin Number
Pin
Type
Buffer
Type
Pin Name
PIC18F6X8X PIC18F8X8X
Description
TQFP PLCC
TQFP
RG5/MCLR/VPP
7
16
50
9
Master Clear (input) or programming
voltage (input).
RG5
MCLR
I
I
ST
ST
General purpose input pin.
Master Clear (Reset) input. This pin is
an active-low Reset to the device.
Programming voltage input.
VPP
P
I
OSC1/CLKI
OSC1
39
49
50
Oscillator crystal or external clock input.
Oscillator crystal input or external clock
source input. ST buffer when configured
in RC mode; otherwise CMOS.
CMOS/ST
CMOS
CLKI
I
External clock source input. Always
associated with pin function OSC1
(see OSC1/CLKI, OSC2/CLKO pins).
OSC2/CLKO/RA6
OSC2
40
51
Oscillator crystal or clock output.
Oscillator crystal output.
O
O
—
—
Connects to crystal or resonator in
Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO
which has 1/4 the frequency of OSC1
and denotes the instruction cycle rate.
General purpose I/O pin.
CLKO
RA6
I/O
TTL
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
Analog = Analog input
ST
I
= Schmitt Trigger input with CMOS levels
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 in all operating modes except Microcontroller – applies to PIC18F8X8X only.
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X8X devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode; otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X8X (80-pin) devices.
6: PSP is available in Microcontroller mode only.
7: On PIC18F8X8X devices, these pins can be multiplexed with RH7/RH6 by changing the ECCPMX
configuration bit.
DS30491C-page 12
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
