PIC18F6585/8585/6680/8680
9.5
RCON Register
The RCON register contains the IPEN bit which is used
to enable prioritized interrupts. The functions of the
other bits in this register are discussed in more detail in
Section 4.14 “RCON Register”.
REGISTER 9-13: RCON REGISTER
R/W-0
IPEN
U-0
—
U-0
—
R/W-1
RI
R-1
TO
R-1
PD
R/W-0
POR
R/W-0
BOR
bit 7
bit 0
bit 7
IPEN: Interrupt Priority Enable bit
1= Enable priority levels on interrupts
0= Disable priority levels on interrupts (PIC16 Compatibility mode)
bit 6-5 Unimplemented: Read as ‘0’
bit 4
bit 3
bit 2
bit 1
bit 0
RI: RESETInstruction Flag bit
For details of bit operation, see Register 4-4.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-4.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-4.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-4.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-4.
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘0’ = Bit is cleared
x = Bit is unknown
2004 Microchip Technology Inc.
DS30491C-page 123
MICROCHIP [ MICROCHIP ]
