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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
When the address byte overflow condition exists, then  
the no Acknowledge (ACK) pulse is given. An overflow  
condition is defined as either bit BF (SSPSTAT<0>) is  
set, or bit SSPOV (SSPCON<6>) is set. This is an error  
condition due to the user’s firmware.  
19.3.1.2  
Reception  
When the R/W bit of the address byte is clear and an  
address match occurs, the R/W bit of the SSPSTAT  
register is cleared. The received address is loaded into  
the SSPBUF register.  
An SSP interrupt is generated for each data transfer  
byte. Flag bit, SSPIF (PIR1<3>), must be cleared in  
software. The SSPSTAT register is used to determine  
the status of the byte.  
FIGURE 19-6:  
I2C™ WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)  
R/W = 0  
Receiving Address  
A7 A6 A5 A4 A3 A2 A1  
Receiving Data  
Receiving Data  
ACK  
9
ACK  
9
ACK  
SDA  
SCL  
D1 D0  
D7 D6 D5 D4 D3 D2  
D7 D6 D5 D4 D3 D2 D1 D0  
3
7
7
1
2
4
8
5
7
8
3
6
9
5
6
1
2
3
6
1
2
4
8
4
5
P
S
Cleared in software  
SSPIF (PIR1<3>)  
Bus master  
terminates  
transfer  
BF (SSPSTAT<0>)  
SSPOV (SSPCON<6>)  
SSPBUF register is read  
SSPOV bit is set because the SSPBUF register is still full  
ACK is not sent  
DS39616D-page 214  
2010 Microchip Technology Inc.