PIC18F2331/2431/4331/4431
Table 18-1 shows the minimum PWM frequencies that
can be generated with the PWM time base and the
prescaler. An operating frequency of 40 MHz
(FCYC = 10 MHz) and PTPER = 0xFFF is assumed in
the table. The PWM module must be capable of gener-
ating PWM signals at the line frequency (50 Hz or
60 Hz) for certain power control applications.
18.3.5
PWM TIME BASE POSTSCALER
The match output of PTMR can optionally be
postscaled through a 4-bit postscaler (which gives a
1:1 to 1:16 scaling inclusive) to generate an interrupt.
The postscaler counter is cleared when any of the
following occurs:
• Write to the PTMR register
• Write to the PTCON register
• Any device Reset
TABLE 18-1: MINIMUM PWM FREQUENCY
Minimum PWM Frequencies vs. Prescaler Value
for FCYC = 10 MIPS (PTPER = 0FFFh)
The PTMR register is not cleared when PTCON is
written.
PWM Frequency
Edge-Aligned
PWM Frequency
Center-Aligned
Prescale
18.4 PWM Time Base Interrupts
1:1
1:4
2441 Hz
610 Hz
153 Hz
38 Hz
1221 Hz
305 Hz
76 Hz
The PWM timer can generate interrupts based on the
modes of operation selected by the PTMOD<1:0> bits
and the postscaler bits (PTOPS<3:0>).
1:16
1:64
19 Hz
18.4.1
INTERRUPTS IN FREE-RUNNING
MODE
When the PWM time base is in the Free-Running mode
(PTMOD<1:0> = 00), an interrupt event is generated
each time a match with the PTPER register occurs. The
PTMR register is reset to zero in the following clock edge.
Using a postscaler selection other than 1:1 will reduce
the frequency of interrupt events.
FIGURE 18-5:
PWM TIME BASE INTERRUPT TIMING, FREE-RUNNING MODE
A: PRESCALER = 1:1
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
FOSC/4
PTMR
1
FFEh
FFFh
000h
001h
002h
PTMR_INT_REQ
PTIF bit
B: PRESCALER = 1:4
Q4
Q4
Qc
Qc Qc Qc
Qc
Qc
Qc Qc
Qc
Qc Qc
Qc
Qc
Qc Qc
001h
Qc
Qc
Qc Qc
002h
Qc
1
PTMR
FFEh
FFFh
000h
PTMR_INT_REQ
PTIF bit
Note 1: PWM Time Base Period register, PTPER, is loaded with the value, FFFh, for this example.
2010 Microchip Technology Inc.
DS39616D-page 181
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