PIC18F2331/2431/4331/4431
18.4.2
INTERRUPTS IN SINGLE-SHOT
MODE
18.4.3
INTERRUPTS IN CONTINUOUS
UP/DOWN COUNT MODE
When the PWM time base is in the Single-Shot mode
(PTMOD<1:0> = 01), an interrupt event is generated
when a match with the PTPER register occurs. The
PWM Time Base register (PTMR) is reset to zero on
the following input clock edge and the PTEN bit is
cleared. The postscaler selection bits have no effect in
this Timer mode.
In the Continuous Up/Down Count mode
(PTMOD<1:0> = 10), an interrupt event is generated
each time the value of the PTMR register becomes
zero and the PWM time base begins to count upwards.
The postscaler selection bits may be used in this mode
of the timer to reduce the frequency of the interrupt
events. Figure 18-7 shows the interrupts in Continuous
Up/Down Count mode.
FIGURE 18-6:
PWM TIME BASE INTERRUPT TIMING, SINGLE-SHOT MODE
A: PRESCALER = 1:1
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
Q1 Q2 Q3
Q4
FOSC/4
PTMR
2
FFEh
FFFh
000h
000h
000h
1
1
1
PTMR_INT_REQ
PTIF bit
B: PRESCALER = 1:4
Q4
Q4
Qc
Qc
Qc Qc
Qc
Qc
Qc Qc
FFFh
Qc Qc
Qc
Qc
Qc
Qc Qc
000h
Qc
Qc Qc Qc
Qc
2
PTMR
PTMR_INT_REQ
PTIF bit
FFEh
000h
000h
1
1
1
Note 1: Interrupt flag bit, PTIF, is sampled here (every Q1).
2: PWM Time Base Period register, PTPER, is loaded with the value, FFFh, for this example.
DS39616D-page 182
2010 Microchip Technology Inc.
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