PIC18F2331/2431/4331/4431
Example 9-3 shows the sequence to do a 16 x 16
unsigned multiply. Equation 9-1 shows the algorithm
that is used. The 32-bit result is stored in four registers,
RES<3:0>.
EQUATION 9-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
RES<3:0>
=
=
ARG1H:ARG1L ARG2H:ARG2L
(ARG1H ARG2H 216) +
EQUATION 9-1:
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
(ARG1H ARG2L 28) +
(ARG1L ARG2H ² 28) +
(ARG1L ARG2L)+
RES<3:0>
=
=
ARG1H:ARG1L ARG2H:ARG2L
(ARG1H ARG2H 216) +
(ARG1H ARG2L 28) +
(ARG1L ARG2H 28) +
(ARG1L ARG2L)
(-1 ARG2H<7> ARG1H:ARG1L 216) +
(-1 ARG1H<7> ARG2H:ARG2L 216)
EXAMPLE 9-4:
16 x 16 SIGNED MULTIPLY
ROUTINE
MOVF
MULWF ARG2L
ARG1L, W
EXAMPLE 9-3:
16 x 16 UNSIGNED
MULTIPLY ROUTINE
; ARG1L * ARG2L ->
; PRODH:PRODL
MOVF
MULWF ARG2L
ARG1L, W
MOVFF PRODH, RES1
MOVFF PRODL, RES0
;
;
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
;
;
MOVFF PRODH, RES1
MOVFF PRODL, RES0
MOVF
ARG1H, W
MULWF ARG2H
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
;
;
MOVF
MULWF ARG2H
ARG1H, W
MOVFF PRODH, RES3
MOVFF PRODL, RES2
; ARG1H * ARG2H ->
; PRODH:PRODL
MOVFF PRODH, RES3
MOVFF PRODL, RES2
;
;
MOVF
MULWF ARG2H
ARG1L,W
; ARG1L * ARG2H ->
; PRODH:PRODL
MOVF
ARG1L, W
MOVF
PRODL, W
;
MULWF ARG2H
; ARG1L * ARG2H ->
ADDWF RES1, F
; Add cross
; PRODH:PRODL
;
; Add cross
; products
MOVF
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
PRODH, W
; products
MOVF
PRODL, W
;
;
;
ADDWF RES1, F
MOVF
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
PRODH, W
;
;
;
;
MOVF
MULWF ARG2L
ARG1H, W
;
; ARG1H * ARG2L ->
;
; PRODH:PRODL
MOVF
ARG1H, W
;
MOVF
PRODL, W
;
MULWF ARG2L
; ARG1H * ARG2L ->
ADDWF RES1, F
; Add cross
; PRODH:PRODL
;
; Add cross
; products
MOVF
ADDWFC RES2, F
CLRF WREG
PRODH, W
; products
MOVF
PRODL, W
;
;
;
ADDWF RES1, F
MOVF
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
PRODH, W
ADDWFC RES3, F
;
;
;
;
;
BTFSS ARG2H, 7
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
BRA
MOVF
SIGN_ARG1
ARG1L, W
SUBWF RES2
Example 9-4 shows the sequence to do a 16 x 16
signed multiply. Equation 9-2 shows the algorithm
used. The 32-bit result is stored in four registers,
RES<3:0>. To account for the sign bits of the argu-
ments, each argument pair’s Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
MOVF
ARG1H, W
SUBWFB RES3
SIGN_ARG1
BTFSS ARG1H, 7
; ARG1H:ARG1L neg?
; no, done
;
;
;
BRA
MOVF
CONT_CODE
ARG2L, W
SUBWF RES2
MOVF
ARG2H, W
SUBWFB RES3
;
CONT_CODE
:
DS39616D-page 96
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
