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PIC18F4431-I/PT 参数 Datasheet PDF下载

PIC18F4431-I/PT图片预览
型号: PIC18F4431-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
7. Set the EECON1 register for the write operation  
by doing the following:  
8.5.1  
FLASH PROGRAM MEMORY WRITE  
SEQUENCE  
• Set the EEPGD bit to point to program  
memory  
The sequence of events for programming an internal  
program memory location should be:  
• Clear the CFGS bit to access program  
memory  
1. Read 64 bytes into RAM.  
2. Update data values in RAM as necessary.  
3. Load Table Pointer with address being erased.  
• Set the WREN bit to enable byte writes  
8. Disable interrupts.  
4. Do the row erase procedure (see Section 8.4.1  
“Flash Program Memory Erase Sequence”).  
9. Write 55h to EECON2.  
10. Write 0AAh to EECON2.  
5. Load Table Pointer with the address of the first  
byte being written.  
11. Set the WR bit. This will begin the write cycle.  
12. The CPU will stall for the duration of the write  
(about 2 ms using internal timer).  
6. Write the first 8 bytes into the holding registers  
with auto-increment.  
13. Execute a NOP.  
14. Re-enable interrupts.  
15. Repeat Steps 6-14 seven times to write  
64 bytes.  
16. Verify the memory (table read).  
This procedure will require about 18 ms to update one  
row of 64 bytes of memory. An example of the required  
code is given in Example 8-3.  
DS39616D-page 92  
2010 Microchip Technology Inc.  
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