PIC18F2331/2431/4331/4431
REGISTER 10-5: PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
R/W-0
U-0
—
U-0
—
R/W-0
EEIF
U-0
—
R/W-0
LVDIF
U-0
—
R/W-0
OSCFIF
CCP2IF
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
OSCFIF: Oscillator Fail Interrupt Flag bit
1= Device oscillator failed, clock input has changed to INTOSC (must be cleared in software)
0= Device clock operating
bit 6-5
bit 4
Unimplemented: Read as ‘0’
EEIF: EEPROM or Flash Write Operation Interrupt Flag bit
1= The write operation is complete (must be cleared in software)
0= The write operation is not complete or has not been started
bit 3
bit 2
Unimplemented: Read as ‘0’
LVDIF: Low-Voltage Detect Interrupt Flag bit
1= The supply voltage has fallen below the specified LVD voltage (must be cleared in software)
0= The supply voltage is greater than the specified LVD voltage
bit 1
bit 0
Unimplemented: Read as ‘0’
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1= A TMR1 register capture occurred (must be cleared in software)
0= No TMR1 register capture occurred
Compare mode:
1= A TMR1 register compare match occurred (must be cleared in software)
0= No TMR1 register compare match occurred
PWM mode:
Not used in this mode.
2010 Microchip Technology Inc.
DS39616D-page 103