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PIC18F4431-I/PT 参数 Datasheet PDF下载

PIC18F4431-I/PT图片预览
型号: PIC18F4431-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
REGISTER 10-3: INTCON3: INTERRUPT CONTROL REGISTER 3  
R/W-1  
R/W-1  
U-0  
R/W-0  
R/W-0  
U-0  
R/W-0  
INT2IF  
R/W-0  
INT1IF  
INT2IP  
INT1IP  
INT2IE  
INT1IE  
bit 7  
bit 0  
Legend:  
R = Readable bit  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
-n = Value at POR  
bit 7  
bit 6  
INT2IP: INT2 External Interrupt Priority bit  
1= High priority  
0= Low priority  
INT1IP: INT1 External Interrupt Priority bit  
1= High priority  
0= Low priority  
bit 5  
bit 4  
Unimplemented: Read as ‘0’  
INT2IE: INT2 External Interrupt Enable bit  
1= Enables the INT2 external interrupt  
0= Disables the INT2 external interrupt  
bit 3  
INT1IE: INT1 External Interrupt Enable bit  
1= Enables the INT1 external interrupt  
0= Disables the INT1 external interrupt  
bit 2  
bit 1  
Unimplemented: Read as ‘0’  
INT2IF: INT2 External Interrupt Flag bit  
1= The INT2 external interrupt occurred (must be cleared in software)  
0= The INT2 external interrupt did not occur  
bit 0  
INT1IF: INT1 External Interrupt Flag bit  
1= The INT1 external interrupt occurred (must be cleared in software)  
0= The INT1 external interrupt did not occur  
Note:  
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding  
enable bit or the global enable bit. User software should ensure the appropriate interrupt flag bits are clear  
prior to enabling an interrupt. This feature allows for software polling.  
2010 Microchip Technology Inc.  
DS39616D-page 101  
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