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PIC18LF6620-I/PT 参数 Datasheet PDF下载

PIC18LF6620-I/PT图片预览
型号: PIC18LF6620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
A timing diagram indicating the transition from the main  
oscillator to the Timer1 oscillator is shown in  
Figure 2-8. The Timer1 oscillator is assumed to be run-  
ning all the time. After the SCS bit is set, the processor  
is frozen at the next occurring Q1 cycle. After eight syn-  
chronization cycles are counted from the Timer1 oscil-  
lator, operation resumes. No additional delays are  
required after the synchronization cycles.  
2.6.2  
OSCILLATOR TRANSITIONS  
PIC18FXX20 devices contain circuitry to prevent  
“glitches” when switching between oscillator sources.  
Essentially, the circuitry waits for eight rising edges of  
the clock source that the processor is switching to. This  
ensures that the new clock source is stable and that its  
pulse width will not be less than the shortest pulse  
width of the two clock sources.  
FIGURE 2-8:  
TIMING DIAGRAM FOR TRANSITION FROM OSC1 TO TIMER1 OSCILLATOR  
Q1 Q2 Q3 Q4 Q1  
Q1  
Q2  
Q3  
Q4  
Q1  
Q2  
Q3  
Q4  
Q1  
TT1P  
1
2
3
4
5
6
7
8
T1OSI  
OSC1  
TSCS  
TOSC  
Internal  
System  
Clock  
TDLY  
SCS  
(OSCCON<0>)  
Program  
PC  
PC + 2  
PC + 4  
Counter  
Note 1: Delay on internal system clock is eight oscillator cycles for synchronization.  
The sequence of events that takes place when switch-  
ing from the Timer1 oscillator to the main oscillator will  
depend on the mode of the main oscillator. In addition  
to eight clock cycles of the main oscillator, additional  
delays may take place.  
If the main oscillator is configured for an external crys-  
tal (HS, XT, LP), then the transition will take place after  
an oscillator start-up time (TOST) has occurred. A timing  
diagram, indicating the transition from the Timer1 oscil-  
lator to the main oscillator for HS, XT and LP modes, is  
shown in Figure 2-9.  
FIGURE 2-9:  
TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS, XT, LP)  
Q1 Q2 Q3 Q4 Q1 Q2 Q3  
Q3  
Q4  
Q1  
TT1P  
T1OSI  
OSC1  
1
2
3
4
5
6
7
8
TOST  
TSCS  
OSC2  
TOSC  
Internal  
System Clock  
SCS  
(OSCCON<0>)  
Program  
Counter  
PC + 6  
PC  
PC + 2  
Note 1: TOST = 1024 TOSC (drawing not to scale).  
DS39609A-page 26  
Advance Information  
2003 Microchip Technology Inc.  
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