PIC18F2220/2320/4220/4320
To set up an Asynchronous Transmission:
5. Enable the transmission by setting bit TXEN
which will also set bit TXIF.
1. Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH (Section 18.2 “USART Baud
Rate Generator (BRG)”).
6. If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
7. Load data to the TXREG register (starts
transmission).
2. Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
8. If using interrupts, ensure that the GIE and PEIE
bits in the INTCON register (INTCON<7:6>) are
set.
3. If interrupts are desired, set enable bit TXIE.
4. If 9-bit transmission is desired, set Transmit bit,
TX9. Can be used as address/data bit.
FIGURE 18-5:
ASYNCHRONOUS RECEPTION
Start
bit
Start
bit
Start
bit
RX (pin)
bit 0 bit 1
bit 7/8
bit 7/8 Stop
bit
bit 7/8 Stop
bit
Stop
bit
bit 0
Rcv Shift
Reg
Rcv Buffer Reg
Word 2
RCREG
Word 1
RCREG
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
Note: This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after the third word,
causing the OERR (Overrun) bit to be set.
TABLE 18-7: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON GIE/GIEH PEIE/ TMR0IE INT0IE RBIE TMR0IF INT0IF
GIEL
RBIF
0000 000x 0000 000u
PIR1
PSPIF(1)
PSPIE(1) ADIE
PSPIP(1) ADIP
ADIF
RCIF
RCIE
RCIP
TXIF
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
IPR1
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D 0000 -00x 0000 -00x
RCREG USART Receive Register
0000 0000 0000 0000
TX9D 0000 -010 0000 -010
0000 0000 0000 0000
TXSTA
CSRC
TX9
TXEN SYNC
—
BRGH TRMT
SPBRG
Baud Rate Generator Register
Legend: x= unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X20 devices; always maintain these bits clear.
2003 Microchip Technology Inc.
DS39599C-page 205
MICROCHIP [ MICROCHIP ]
