PIC18F2220/2320/4220/4320
FIGURE 18-2:
ASYNCHRONOUS TRANSMISSION
Write to TXREG
Word 1
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
Start bit
bit 0
bit 1
Word 1
bit 7/8
Stop bit
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
1 TCY
Word 1
Transmit Shift Reg
TRMT bit
(Transmit Shift
Reg. Empty Flag)
FIGURE 18-3:
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
Write to TXREG
Word 2
Start bit
Word 1
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
Start bit
Word 2
bit 0
bit 1
bit 7/8
bit 0
Stop bit
TXIF bit
(Interrupt Reg. Flag)
1 TCY
Word 1
1 TCY
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Transmit Shift Reg.
Word 2
Transmit Shift Reg.
Note: This timing diagram shows two consecutive transmissions.
TABLE 18-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF
RBIF
0000 000x 0000 000u
PIR1
PSPIF(1)
PSPIE(1)
PSPIP(1)
SPEN
ADIF
ADIE
ADIP
RX9
RCIF
RCIE
RCIP
TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
PIE1
IPR1
RCSTA
SREN CREN ADDEN FERR
OERR
RX9D 0000 -00x 0000 -00x
0000 0000 0000 0000
TXREG USART Transmit Register
TXSTA CSRC TX9 TXEN SYNC
SPBRG Baud Rate Generator Register
—
BRGH TRMT
TX9D 0000 -010 0000 -010
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X20 devices; always maintain these bits clear.
2003 Microchip Technology Inc.
DS39599C-page 203
MICROCHIP [ MICROCHIP ]
