PIC18F2220/2320/4220/4320
FIGURE 10-12:
BLOCK DIAGRAM OF RD4:RD0 PINS
PORTD/CCP1 Select
PSPMODE
RD LATD
Data Bus
VDD
P
D
Q
Q
WR LATD
or
PORTD
CK
Data Latch
D
Q
I/O pin(1)
WR TRISD
PSP Read
RD TRISD
Q
CK
0
1
N
TRIS Latch
VSS
TTL Buffer
1
0
Q
D
EN
EN
RD PORTD
PSP Write
Schmitt Trigger
Input Buffer
0
1
Note 1: I/O pins have diode protection to VDD and VSS.
TABLE 10-7: PORTD FUNCTIONS
Name
Bit# Buffer Type
Function
RD0/PSP0
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
ST/TTL(1) Input/output port pin or Parallel Slave Port bit 0.
ST/TTL(1) Input/output port pin or Parallel Slave Port bit 1.
ST/TTL(1) Input/output port pin or Parallel Slave Port bit 2.
ST/TTL(1) Input/output port pin or Parallel Slave Port bit 3.
ST/TTL(1) Input/output port pin or Parallel Slave Port bit 4.
ST/TTL(1) Input/output port pin, Parallel Slave Port bit 5 or enhanced PWM output P1B.
ST/TTL(1) Input/output port pin, Parallel Slave Port bit 6 or enhanced PWM output P1C.
ST/TTL(1) Input/output port pin, Parallel Slave Port bit 7 or enhanced PWM output P1D.
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5/P1B
RD6/PSP6/P1C
RD7/PSP7/P1D
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
TABLE 10-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Value on
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
Resets
PORTD
LATD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx
xxxx xxxx
1111 1111
0000 -111
uuuu uuuu
uuuu uuuu
1111 1111
0000 -111
0000 0000
LATD Data Latch Register
TRISD
PORTD Data Direction Register
TRISE
IBF
OBF
IBOV
PSPMODE
DC1B0
—
PORTE Data Direction bits
CCP1CON
Legend:
P1M1
P1M0
DC1B1
CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000
x= unknown, u= unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
DS39599C-page 110
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
