欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F2320-I/SP的Datasheet PDF文件第189页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第190页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第191页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第192页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第194页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第195页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第196页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第197页  
PIC18F2220/2320/4220/4320  
FIGURE 17-27:  
BUS COLLISION DURING START CONDITION (SCL = 0)  
SDA = 0, SCL = 1  
TBRG  
TBRG  
SDA  
Set SEN, enable Start  
sequence if SDA = 1, SCL = 1  
SCL  
SEN  
SCL = 0before SDA = 0,  
bus collision occurs. Set BCLIF.  
SCL = 0before BRG time-out,  
bus collision occurs. Set BCLIF.  
BCLIF  
Interrupt cleared  
in software  
S
0’  
0’  
0’  
0’  
SSPIF  
FIGURE 17-28:  
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION  
SDA = 0, SCL = 1  
Set S  
Set SSPIF  
Less than TBRG  
TBRG  
SDA pulled low by other master.  
Reset BRG and assert SDA.  
SDA  
SCL  
S
SCL pulled low after BRG  
Time-out  
SEN  
Set SEN, enable Start  
sequence if SDA = 1, SCL = 1  
BCLIF  
0’  
S
SSPIF  
SDA = 0, SCL = 1,  
set SSPIF  
Interrupts cleared  
in software  
2003 Microchip Technology Inc.  
DS39599C-page 191