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PIC17C752T-25I/P 参数 Datasheet PDF下载

PIC17C752T-25I/P图片预览
型号: PIC17C752T-25I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能8位CMOS微控制器的EPROM [High-Performance 8-Bit CMOS EPROM Microcontrollers]
分类和应用: 微控制器可编程只读存储器电动程控只读存储器
文件页数/大小: 320 页 / 2172 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC17C75X  
Example 9-2 shows the sequence to do an 8 x 8 signed  
multiply. To account for the sign bits of the arguments,  
each argument’s most significant bit (MSb) is tested  
and the appropriate subtractions are done.  
9.0  
HARDWARE MULTIPLIER  
All PIC17C75X devices have an 8 x 8 hardware multi-  
plier included in the ALU of the device. By making the  
multiply a hardware operation, it completes in a single  
instruction cycle.This is an unsigned multiply that gives  
a 16-bit result. The result is stored into the 16-bit  
PRODuct register (PRODH:PRODL). The multiplier  
does not affect any flags in the ALUSTA register.  
EXAMPLE 9-1: 8 x 8 UNSIGNED MULTIPLY  
ROUTINE  
MOVFP  
MULWF  
ARG1, WREG  
ARG2  
;
Making the 8 x 8 multiplier execute in a single cycle  
gives the following advantages:  
; ARG1 * ARG2 ->  
;
PRODH:PRODL  
• Higher computational throughput  
• Reduces code size requirements for multiply algo-  
rithms  
EXAMPLE 9-2: 8 x 8 SIGNED MULTIPLY  
ROUTINE  
The performance increase allows the device to be used  
in applications previously reserved for Digital Signal  
Processors.  
MOVFP  
MULWF  
ARG1, WREG  
ARG2  
; ARG1 * ARG2 ->  
PRODH:PRODL  
; Test Sign Bit  
; PRODH = PRODH  
Table 9-1 shows a performance comparison between  
PIC17CXXX devices using the single cycle hardware  
multiply, and performing the same function without the  
hardware multiply.  
;
BTFSC  
SUBWF  
ARG2, SB  
PRODH, F  
;
- ARG1  
MOVFP  
BTFSC  
SUBWF  
ARG2, WREG  
ARG1, SB  
PRODH, F  
Example 9-1 shows the sequence to do an 8 x 8  
unsigned multiply. Only one instruction is required  
when one argument of the multiply is already loaded in  
the WREG register.  
; Test Sign Bit  
; PRODH = PRODH  
;
- ARG2  
TABLE 9-1:  
PERFORMANCE COMPARISON  
Multiply Method  
Time  
Program Memory  
(Words)  
Routine  
Cycles (Max)  
@ 33 MHz  
8 x 8 unsigned  
8 x 8 signed  
Without hardware multiply  
Hardware multiply  
13  
1
69  
1
8.364 µs  
0.121 µs  
Without hardware multiply  
Hardware multiply  
6
6
0.727 µs  
29.333 µs  
2.91 µs  
30.788 µs  
4.36 µs  
16 x 16 unsigned  
16 x 16 signed  
Without hardware multiply  
Hardware multiply  
21  
24  
52  
36  
242  
24  
254  
36  
Without hardware multiply  
Hardware multiply  
1997 Microchip Technology Inc.  
Preliminary  
DS30264A-page 61  
 
 
 
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