PIC16F913/914/916/917/946
TABLE 2-3:
PIC16F91X/946 SPECIAL FUNCTION REGISTERS SUMMARY BANK 2
Value on
POR, BOR
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
Bank 2
100h INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
41,226
99,226
40,226
32,226
41,226
235,227
54,226
145,227
146,227
145,228
40,226
34,226
188,228
188,228
101h TMR0
102h PCL
Program Counter’s (PC) Least Significant Byte
103h STATUS
104h FSR
IRP
RP1
RP0
TO
PD
Z
DC
C
Indirect Data Memory Address Pointer
105h WDTCON
106h PORTB
107h LCDCON
108h LCDPS
109h LVDCON
10Ah PCLATH
10Bh INTCON
—
RB7
LCDEN
WFT
—
—
RB6
—
WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN ---0 1000
RB5
RB4
VLCDEN
WA
RB3
CS1
LP3
—
RB2
CS0
RB1
LMUX1
LP1
RB0
LMUX0
LP0
xxxx xxxx
0001 0011
0000 0000
--00 -100
---0 0000
0000 000x
SLPEN
BIASMD
—
WERR
LCDA
IRVST
—
LP2
LVDEN
LVDL2
LVDL1
LVDL0
—
—
Write Buffer for the upper 5 bits of the Program Counter
INTE RBIE T0IF INTF RBIF
GIE
PEIE
T0IE
EEDATL
EEADRL
EEDATL7 EEDATL6 EEDATL5 EEDATL4 EEDATL3 EEDATL2 EEDATL1 EEDATL0 0000 0000
EEADRL7 EEADRL6 EEADRL5 EEADRL4 EEADRL3 EEADRL2 EEADRL1 EEADRL0 0000 0000
10Ch
10Dh
EEDATH5 EEDATH4 EEDATH3 EEDATH2 EEDATH1 EEDATH0
10Eh EEDATH
10Fh EEADRH
110h LCDDATA0
—
—
—
—
--00 0000
---0 0000
xxxx xxxx
188,228
188,228
147,228
EEADRH4 EEADRH3 EEADRH2 EEADRH1 EEADRH0
—
SEG7
COM0
SEG6
COM0
SEG5
COM0
SEG4
COM0
SEG3
COM0
SEG2
COM0
SEG1
COM0
SEG0
COM0
111h LCDDATA1
112h LCDDATA2(2)
113h LCDDATA3
114h LCDDATA4
115h LCDDATA5(2)
116h LCDDATA6
117h LCDDATA7
118h LCDDATA8(2)
119h LCDDATA9
11Ah LCDDATA10
SEG15
COM0
SEG14
COM0
SEG13
COM0
SEG12
COM0
SEG11
COM0
SEG10
COM0
SEG9
COM0
SEG8
COM0
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
147,228
147,228
147,228
147,228
147,228
147,228
147,228
147,228
147,228
147,228
147,228
SEG23
COM0
SEG22
COM0
SEG21
COM0
SEG20
COM0
SEG19
COM0
SEG18
COM0
SEG17
COM0
SEG16
COM0
SEG7
COM1
SEG6
COM1
SEG5
COM1
SEG4
COM1
SEG3
COM1
SEG2
COM1
SEG1
COM1
SEG0
COM1
SEG15
COM1
SEG14
COM1
SEG13
COM1
SEG12
COM1
SEG11
COM1
SEG10
COM1
SEG9
COM1
SEG8
COM1
SEG23
COM1
SEG22
COM1
SEG21
COM1
SEG20
COM1
SEG19
COM1
SEG18
COM1
SEG17
COM1
SEG16
COM1
SEG7
COM2
SEG6
COM2
SEG5
COM2
SEG4
COM2
SEG3
COM2
SEG2
COM2
SEG1
COM2
SEG0
COM2
SEG15
COM2
SEG14
COM2
SEG13
COM2
SEG12
COM2
SEG11
COM2
SEG10
COM2
SEG9
COM2
SEG8
COM2
SEG23
COM2
SEG22
COM2
SEG21
COM2
SEG20
COM2
SEG19
COM2
SEG18
COM2
SEG17
COM2
SEG16
COM2
SEG7
COM3
SEG6
COM3
SEG5
COM3
SEG4
COM3
SEG3
COM3
SEG2
COM3
SEG1
COM3
SEG0
COM3
SEG15
COM3
SEG14
COM3
SEG13
COM3
SEG12
COM3
SEG11
COM3
SEG10
COM3
SEG9
COM3
SEG8
COM3
LCDDATA11(2)
11Bh
SEG23
COM3
SEG22
COM3
SEG21
COM3
SEG20
COM3
SEG19
COM3
SEG18
COM3
SEG17
COM3
SEG16
COM3
11Ch LCDSE0(3)
11Dh LCDSE1(3)
11Eh LCDSE2(2,3)
SE7
SE15
SE23
SE6
SE14
SE22
SE5
SE13
SE21
SE4
SE12
SE20
SE3
SE11
SE19
SE2
SE10
SE18
SE1
SE9
SE0
SE8
0000 0000
0000 0000
0000 0000
—
147,228
147,228
147,228
—
SE17
SE16
11Fh
—
Unimplemented
Legend:
Note 1:
–= Unimplemented locations read as ‘0’, u= unchanged, x= unknown, q= value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
PIC16F914/917 and PIC16F946 only.
2:
3:
This register is only initialized by a POR or BOR reset and is unchanged by other Resets.
DS41250F-page 30
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
