PIC16F913/914/916/917/946
TABLE 2-1:
PIC16F91X/946 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Value on
POR, BOR
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---0 0000
0000 000x
0000 0000
41,226
99,226
TMR0
PCL
Program Counter’s (PC) Least Significant Byte
40,226
STATUS
FSR
IRP
RP1
RP0
TO
PD
Z
DC
C
32,226
Indirect Data Memory Address Pointer
41,226
PORTA
PORTB
PORTC
PORTD(2)
PORTE
PCLATH
INTCON
PIR1
RA7
RB7
RC7
RD7
RE7(3)
—
RA6
RB6
RC6
RD6
RE6(3)
—
RA5
RB5
RC5
RD5
RE5(3)
—
RA4
RB4
RA3
RB3
RC3
RD3
RE3
RA2
RB2
RA1
RB1
RA0
RB0
44,226
54,226
RC4
RC2
RC1
RC0
62,226
RD4
RE4(3)
RD2
RE2(2)
RD1
RE1(2)
RD0
RE0(2)
71,226
76,226
Write Buffer for upper 5 bits of Program Counter
40,226
GIE
PEIE
ADIF
C2IF
T0IE
RCIF
C1IF
INTE
TXIF
RBIE
SSPIF
—
T0IF
CCP1IF
LVDIF
INTF
TMR2IF
—
RBIF
34,226
EEIF
OSFIF
TMR1IF
CCP2IF(2) 0000 -0-0
37,226
PIR2
LCDIF
38,226
TMR1L
TMR1H
T1CON
TMR2
Holding Register for the Least Significant Byte of the 16-bit TMR1
Holding Register for the Most Significant Byte of the 16-bit TMR1
xxxx xxxx
102,226
102,226
105,226
107,226
108,226
196,226
195,226
213,226
213,226
212,226
131,226
130,226
128,227
213,227
213,227
212,227
182,227
180,227
xxxx xxxx
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000
Timer2 Module Register 0000 0000
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
—
Synchronous Serial Port Receive Buffer/Transmit Register
WCOL SSPOV SSPEN CKP SSPM3
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
SSPM2
SSPM1
SSPM0
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
—
—
CCP1X
SREN
CCP1Y
CREN
CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000
SPEN
RX9
ADDEN
FERR
OERR
RX9D
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
USART Transmit Data Register
USART Receive Data Register
1Bh(2) CCPR2L
1Ch(2) CCPR2H
1Dh(2) CCP2CON
Capture/Compare/PWM Register 2 (LSB)
Capture/Compare/PWM Register 2 (MSB)
—
—
CCP2X
A/D Result Register High Byte
ADFM VCFG1 VCFG0
CCP2Y
CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000
1Eh
1Fh
ADRESH
ADCON0
xxxx xxxx
CHS2
CHS1
CHS0
GO/DONE
ADON
0000 0000
Legend:
Note 1:
-= Unimplemented locations read as ‘0’, u= unchanged, x= unknown, q= value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
PIC16F914/917 and PIC16F946 only, forced ‘0’ on PIC16F913/916.
2:
3:
PIC16F946 only, forced to ‘0’ on PIC16F91X.
DS41250F-page 28
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
