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PIC16F87-I/P 参数 Datasheet PDF下载

PIC16F87-I/P图片预览
型号: PIC16F87-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 18 /20/ 28引脚增强型闪存微控制器采用纳瓦技术 [18/20/28-Pin Enhanced FLASH Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 214 页 / 3543 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F87/88  
15.14 In-Circuit Debugger  
15.17 In-Circuit Serial Programming  
When the DEBUG bit in the configuration word is pro-  
grammed to a ‘0’, the In-Circuit Debugger functionality  
is enabled. This function allows simple debugging func-  
tions when used with MPLAB® ICD. When the micro-  
controller has this feature enabled, some of the  
resources are not available for general use. Table 15-7  
shows which features are consumed by the background  
debugger.  
PIC16F87/88 microcontrollers can be serially pro-  
grammed while in the end application circuit. This is  
simply done with two lines for clock and data and three  
other lines for power, ground, and the programming  
voltage (see Figure 15-13 for an example). This allows  
customers to manufacture boards with unprogrammed  
devices and then program the microcontroller just  
before shipping the product. This also allows the most  
recent firmware or  
programmed.  
a custom firmware to be  
TABLE 15-7: DEBUGGER RESOURCES  
For more information on serial programming, please  
refer to the PIC16F87/88 Programming Specification  
(DS39607).  
I/O pins  
RB6, RB7  
1 level  
Stack  
Program Memory  
Address 0000h must be NOP  
Last 100h words  
FIGURE 15-13:  
TYPICAL IN-CIRCUIT  
SERIAL PROGRAMMING  
CONNECTION  
Data Memory  
0x070 (0x0F0, 0x170, 0x1F0)  
0x1EB-0x1EF  
To use the In-Circuit Debugger function of the micro-  
controller, the design must implement In-Circuit Serial  
Programming connections to MCLR/VPP, VDD, GND,  
RB7 and RB6. This will interface to the In-Circuit  
Debugger module available from Microchip, or one of  
the third party development tool companies.  
To Normal  
Connections  
External  
Connector  
Signals  
*
PIC16F87/88  
+5V  
0V  
VDD  
VSS  
15.15 Program Verification/Code  
Protection  
VPP  
MCLR/VPP  
RB6  
CLK  
If the code protection bit(s) have not been pro-  
grammed, the on-chip program memory can be read  
out for verification purposes.  
Data I/O  
RB7  
RB3  
RB3/PGM  
15.16 ID Locations  
Four memory locations (2000h - 2003h) are designated  
as ID locations, where the user can store checksum or  
other code identification numbers. These locations are  
not accessible during normal execution, but are read-  
able and writable during program/verify. It is recom-  
mended that only the four Least Significant bits of the  
ID location are used.  
*
*
*
VDD  
To Normal  
Connections  
* Isolation devices (as required).  
RB3 only used in LVP mode.  
2003 Microchip Technology Inc.  
Preliminary  
DS30487B-page 147  
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