PIC16F818/819
To enable the serial port, SSP Enable bit, SSPEN
(SSPCON<5>), must be set. To reset or reconfigure
SPI mode, clear bit SSPEN, reinitialize the SSPCON
register and then set bit SSPEN. This configures the
SDI, SDO, SCK and SS pins as serial port pins. For the
pins to behave as the serial port function, they must
have their data direction bits (in the TRISB register)
appropriately programmed. That is:
FIGURE 10-1:
SSP BLOCK DIAGRAM
(SPI™ MODE)
Internal
Data Bus
Read
Write
SSPBUF reg
SSPSR reg
• SDI must have TRISB<1> set
• SDO must have TRISB<2> cleared
• SCK (Master mode) must have TRISB<4> cleared
• SCK (Slave mode) must have TRISB<4> set
• SS must have TRISB<5> set
Shift
Clock
RB1/SDI/SDA
bit 0
Note 1: When the SPI is in Slave mode
with the SS pin control enabled
(SSPCON<3:0> = 0100), the SPI module
will reset if the SS pin is set to VDD.
RB2/SDO/
CCP1
Control
Enable
SS
2: If the SPI is used in Slave mode with
CKE = 1, then the SS pin control must be
enabled.
RB5/SS
Edge
Select
3: When the SPI is in Slave mode
with the SS pin control enabled
(SSPCON<3:0> = 0100), the state of the
SS pin can affect the state read back from
the TRISB<2> bit. The peripheral OE
signal from the SSP module into PORTB
controls the state that is read back from
the TRISB<2> bit. If read-modify-write
instructions, such as BSF are performed
on the TRISB register while the SS pin is
high, this will cause the TRISB<2> bit to
be set, thus disabling the SDO output.
2
Clock Select
SSPM3:SSPM0
4
TMR2 Output
2
Edge
Select
TCY
Prescaler
4, 16, 64
RB4/SCK/
SCL
TRISB<4>
TABLE 10-1: REGISTERS ASSOCIATED WITH SPI™ OPERATION
Value on
all other
Resets
Value on
POR, BOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh,8Bh
INTCON
GIE
PEIE TMR0IE INTE
RBIE TMR0IF
INTF
RBIF
0000 000x 0000 000u
10Bh,18Bh
0Ch
PIR1
—
—
ADIF
ADIE
—
—
—
—
SSPIF CCP1IF TMR2IF TMR1IF -0-- 0000 -0-- 0000
SSPIE CCP1IE TMR2IE TMR1IE -0-- 0000 -0-- 0000
1111 1111 1111 1111
8Ch
PIE1
86h
TRISB
PORTB Data Direction Register
13h
SSPBUF
SSPCON
SSPSTAT
Synchronous Serial Port Receive Buffer/Transmit Register
WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
SMP CKE D/A R/W UA BF 0000 0000 0000 0000
xxxx xxxx uuuu uuuu
14h
94h
P
S
Legend:
x= unknown, u= unchanged, -= unimplemented, read as ‘0’. Shaded cells are not used by the SSP in SPI™ mode.
DS39598E-page 74
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
