PIC16F818/819
10.2 SPI Mode
10.0 SYNCHRONOUS SERIAL PORT
(SSP) MODULE
This section contains register definitions and
operational characteristics of the SPI module.
10.1 SSP Module Overview
SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. To
accomplish communication, typically three pins are
used:
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The SSP module
can operate in one of two modes:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
RB2/SDO/CCP1
RB1/SDI/SDA
RB4/SCK/SCL
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I2C)
Additionally, a fourth pin may be used when in a Slave
mode of operation:
An overview of I2C operations and additional informa-
tion on the SSP module can be found in the “PICmicro®
Mid-Range MCU Family Reference Manual”
(DS33023).
• Slave Select (SS)
RB5/SS
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and the SSPSTAT register (SSPSTAT<7:6>). These
control bits allow the following to be specified:
Refer to Application Note AN578, “Use of the SSP
Module in the I2C™ Multi-Master Environment”
(DS00578).
• Master mode (SCK is the clock output)
• Slave mode (SCK is the clock input)
• Clock Polarity (Idle state of SCK)
• Clock Edge (output data on rising/falling
edge of SCK)
• Clock Rate (Master mode only)
• Slave Select mode (Slave mode only)
Note:
Before enabling the module in SPI Slave
mode, the state of the clock line (SCK)
must match the polarity selected for the
Idle state. The clock line can be observed
by reading the SCK pin. The polarity of the
Idle state is determined by the CKP bit
(SSPCON<4>).
2004 Microchip Technology Inc.
DS39598E-page 71
MICROCHIP [ MICROCHIP ]
