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PIC16F722-I/SS 参数 Datasheet PDF下载

PIC16F722-I/SS图片预览
型号: PIC16F722-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚闪存单片机采用纳瓦XLP技术 [28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology]
分类和应用: 闪存微控制器
文件页数/大小: 302 页 / 4540 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F72X/PIC16LF72X  
impedance is decreased, the acquisition time may be  
decreased. After the analog input channel is selected  
(or changed), an A/D acquisition must be done before  
the conversion can be started. To calculate the mini-  
mum acquisition time, Equation 9-1 may be used. This  
equation assumes that 1/2 LSb error is used (256 steps  
for the ADC). The 1/2 LSb error is the maximum error  
allowed for the ADC to meet its specified resolution.  
9.3  
A/D Acquisition Requirements  
For the ADC to meet its specified accuracy, the charge  
holding capacitor (CHOLD) must be allowed to fully  
charge to the input channel voltage level. The Analog  
Input model is shown in Figure 9-3. The source imped-  
ance (RS) and the internal sampling switch (RSS)  
impedance directly affect the time required to charge  
the capacitor CHOLD. The sampling switch (RSS)  
impedance varies over the device voltage (VDD), refer  
to Figure 9-3. The maximum recommended imped-  
ance for analog sources is 10 kΩ. As the source  
EQUATION 9-1:  
ACQUISITION TIME EXAMPLE  
Temperature = 50°C and external impedance of 10kΩ 5.0V VDD  
Assumptions:  
TACQ = Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient  
= TAMP + TC + TCOFF  
= 2µs + TC + [(Temperature - 25°C)(0.05µs/°C)]  
The value for TC can be approximated with the following equations:  
1
;[1] VCHOLD charged to within 1/2 lsb  
VAPPLIED 1 -------------------------- = VCHOLD  
(2n + 1) 1  
TC  
---------  
VAPPLIED 1 e RC = VCHOLD  
;[2] VCHOLD charge response to VAPPLIED  
;combining [1] and [2]  
Tc  
--------  
1
VAPPLIED 1 eRC = VAPPLIED 1 --------------------------  
(2n + 1) 1  
Note: Where n = number of bits of the ADC.  
Solving for TC:  
TC = CHOLD(RIC + RSS + RS) ln(1/511)  
= 10pF(1kΩ + 7kΩ + 10kΩ) ln(0.001957)  
= 1.12µs  
Therefore:  
TACQ = 2ΜS + 1.12ΜS + [(50°C- 25°C)(0.05ΜS/°C)]  
= 4.42ΜS  
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.  
2: The charge holding capacitor (CHOLD) is not discharged after each conversion.  
3: The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin  
leakage specification.  
DS41341E-page 106  
© 2009 Microchip Technology Inc.  
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