PIC16F72X/PIC16LF72X
FIGURE 9-3:
ANALOG INPUT MODEL
VDD
Sampling
Switch
VT ≈ 0.6V
ANx
SS
RIC ≤ 1k
Rss
Rs
(1)
CPIN
5 pF
VA
I LEAKAGE
CHOLD = 10 pF
VSS/VREF-
VT ≈ 0.6V
6V
5V
RSS
VDD 4V
3V
Legend:
CHOLD
CPIN
= Sample/Hold Capacitance
= Input Capacitance
2V
I LEAKAGE = Leakage current at the pin due to
various junctions
5 6 7 8 9 1011
Sampling Switch
RIC
RSS
SS
VT
= Interconnect Resistance
= Resistance of Sampling Switch
= Sampling Switch
(kΩ)
= Threshold Voltage
Note 1: Refer to Section 23.0 “Electrical Specifications”.
FIGURE 9-4:
ADC TRANSFER FUNCTION
Full-Scale Range
FFh
FEh
FDh
FCh
FBh
1 LSB ideal
Full-Scale
Transition
04h
03h
02h
01h
00h
Analog Input Voltage
1 LSB ideal
Zero-Scale
Transition
VREF
VSS
© 2009 Microchip Technology Inc.
DS41341E-page 107
MICROCHIP [ MICROCHIP ]
