PIC16F688
4.2.5.6
RA5/T1CKI/OSC1/CLKIN
FIGURE 4-6:
BLOCK DIAGRAM OF RA5
Figure 4-6 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
INTOSC
Mode
TMR1LPEN(1)
VDD
Data Bus
D
• a general purpose I/O
• a Timer1 clock input
• a crystal/resonator connection
• a clock input
Q
Q
WR
WPUA
CK
Weak
RAPU
RD
WPUA
Oscillator
Circuit
OSC2
VDD
D
Q
Q
WR
PORTA
CK
D
Q
Q
I/O pin
VSS
WR
TRISA
CK
INTOSC
Mode
RD
TRISA
RD
PORTA
(2)
D
Q
Q
Q
Q
D
CK
WR
IOCA
Q3
EN
RD
IOCA
D
EN
Interrupt-on-
change
RD PORTA
To Timer1 or CLKGEN
Note 1: Timer1 LP oscillator enabled.
2: When using Timer1 with LP oscillator, the
Schmitt Trigger is bypassed.
DS41203C-page 40
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
