PIC16F688
FIGURE 10-11:
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RC5/RX/DT pin
bit 0
bit 2
bit 1
bit 6
bit 7
RC4/C2OUT/TX/CK pin
Write to
TXREG Reg
TXIF bit
TRMT bit
TXEN bit
TABLE 10-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Value on
all other
Resets
Value on
POR, BOD
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Ch PIR1
EEIF
ADIF
RCIF
—
C2IF
C1IF
OSFIF
—
TXIF
WUE
TMR1IF 0000 0000
ABDEN 00-0 0-00
0000 0000
0000 0000
00-0 0-00
0000 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000X
0000 0000
11h BAUDCTL ABDOVF RCIDL
SCKP BRG16
12h SPBRGH USART Baud Rate High Generator
13h SPBRG
14h RCREG
15h TXREG
16h TXSTA
17h RCSTA
8Ch PIE1
USART Baud Rate Generator
USART Receive Register
USART Transmit Register
0000 0000
0000 0000
0000 0000
CSRC
SPEN
EEIE
TX9
RX9
ADIE
TXEN
SREN CREN ADDEN FERR
RCIE C2IE C1IE OSFIE
SYNC SENDB BRGH TRMT
TX9D
RX9D
0000 0010
0000 000X
OERR
TXIE
TMR1IE 0000 0000
Legend:
x= unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for Asynchronous Reception.
DS41203B-page 94
Preliminary
2004 Microchip Technology Inc.