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PIC16F688-I/P 参数 Datasheet PDF下载

PIC16F688-I/P图片预览
型号: PIC16F688-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 14引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 174 页 / 2918 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F688  
10.3.5  
BREAK CHARACTER SEQUENCE  
10.3.5.1  
Break and Sync Transmit Sequence  
The EUSART module has the capability of sending the  
special Break character sequences that are required by  
the LIN bus standard. The Break character transmit  
consists of a Start bit, followed by 12 ‘0’ bits and a Stop  
bit. The frame Break character is sent whenever the  
SENDB and TXEN bits (TXSTA<3> and TXSTA<5>)  
are set, while the Transmit Shift register is loaded with  
data. Note that the value of data written to TXREG will  
be ignored and all ‘0’s will be transmitted.  
The following sequence will send a message frame  
header made up of a Break, followed by an auto baud  
Sync byte. This sequence is typical of a LIN bus  
master.  
1. Configure the USART for the desired mode.  
2. Set the TXEN and SENDB bits to setup the  
Break character.  
3. Load the TXREG with a dummy character to  
initiate transmission (the value is ignored).  
The SENDB bit is automatically reset by hardware after  
the corresponding Stop bit is sent. This allows the user  
to preload the transmit FIFO with the next transmit byte  
following the Break character (typically, the Sync  
character in the LIN specification).  
4. Write ‘55h’ to TXREG to load the Sync character  
into the transmit FIFO buffer.  
5. After the Break has been sent, the SENDB bit is  
reset by hardware. The Sync character now  
transmits in the Pre-Configured mode.  
Note that the data value written to the TXREG for the  
Break character is ignored. The write simply serves the  
purpose of initiating the proper sequence.  
When the TXREG becomes empty, as indicated by the  
TXIF, the next data byte can be written to TXREG.  
The TRMT bit indicates when the transmit operation is  
active or IDLE, just as it does during normal transmis-  
sion. See Figure 10-9 for the timing of the Break  
character sequence.  
10.3.6  
RECEIVING A BREAK CHARACTER  
The Enhanced USART module can receive a Break  
character in two ways.  
The first method forces to configure the baud rate at a  
frequency of 9/13 the typical speed. This allows for the  
Stop bit transition to be at the correct sampling location  
(13 bits for Break versus Start bit and 8 data bits for  
typical data).  
The second method uses the auto-wake-up feature  
described in Section 10.3.4 “Auto-Wake-up on  
SYNC Break Character”. By enabling this feature, the  
USART will sample the next two transitions on RX/DT,  
cause an RCIF interrupt, and receive the next data byte  
followed by another interrupt.  
Note that following a Break character, the user will  
typically want to enable the Auto Baud Rate Detect  
feature. For both methods, the user can set the ABD bit  
before placing the USART in its Sleep mode.  
FIGURE 10-9:  
SEND BREAK CHARACTER SEQUENCE  
Write to TXREG  
Dummy Write  
BRG Output  
(Shift Clock)  
TX (pin)  
Start Bit  
Bit 0  
Bit 1  
Bit 11  
Stop Bit  
Break  
TXIF bit  
(Transmit Buffer  
Reg. Empty Flag)  
TRMT bit  
(Transmit Shift  
Reg. Empty Flag)  
SENDB Sampled Here  
Auto Cleared  
SENDB  
(Transmit Shift  
Reg. Empty Flag)  
DS41203B-page 92  
Preliminary  
2004 Microchip Technology Inc.  
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