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PIC16F688-I/P 参数 Datasheet PDF下载

PIC16F688-I/P图片预览
型号: PIC16F688-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 14引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 174 页 / 2918 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F688  
2.2.2.3  
INTCON Register  
Note:  
Interrupt flag bits are set when an interrupt  
condition occurs, regardless of the state of  
its corresponding enable bit or the global  
enable bit, GIE (INTCON<7>). User  
software should ensure the appropriate  
interrupt flag bits are clear prior to  
enabling an interrupt.  
The INTCON register is a readable and writable  
register, which contains the various enable and flag bits  
for TMR0 register overflow, PORTA change and  
external RA2/INT pin interrupts.  
REGISTER 2-3:  
INTCON – INTERRUPT CONTROL REGISTER (ADDRESS: 0Bh OR 8Bh)  
R/W-0  
GIE  
R/W-0  
PEIE  
R/W-0  
T0IE  
R/W-0  
INTE  
R/W-0  
RAIE  
R/W-0  
T0IF  
R/W-0  
INTF  
R/W-0  
RAIF  
bit 7  
bit 0  
bit 7  
bit 6  
bit 5  
bit 4  
bit 3  
bit 2  
bit 1  
bit 0  
GIE: Global Interrupt Enable bit  
1= Enables all unmasked interrupts  
0= Disables all interrupts  
PEIE: Peripheral Interrupt Enable bit  
1= Enables all unmasked peripheral interrupts  
0= Disables all peripheral interrupts  
T0IE: TMR0 Overflow Interrupt Enable bit  
1= Enables the TMR0 interrupt  
0= Disables the TMR0 interrupt  
INTE: RA2/INT External Interrupt Enable bit  
1= Enables the RA2/INT external interrupt  
0= Disables the RA2/INT external interrupt  
RAIE: PORTA Change Interrupt Enable bit(1)  
1= Enables the PORTA change interrupt  
0= Disables the PORTA change interrupt  
T0IF: TMR0 Overflow Interrupt Flag bit(2)  
1= TMR0 register has overflowed (must be cleared in software)  
0= TMR0 register did not overflow  
INTF: RA2/INT External Interrupt Flag bit  
1= The RA2/INT external interrupt occurred (must be cleared in software)  
0= The RA2/INT external interrupt did not occur  
RAIF: PORTA Change Interrupt Flag bit  
1= When at least one of the PORTA <5:0> pins changed state (must be cleared in software)  
0= None of the PORTA <5:0> pins have changed state  
Note 1: IOCA register must also be enabled.  
2: T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should  
be initialized before clearing T0IF bit.  
Legend:  
R = Readable bit  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
- n = Value at POR  
2004 Microchip Technology Inc.  
Preliminary  
DS41203B-page 15