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PIC16F57-I/SO 参数 Datasheet PDF下载

PIC16F57-I/SO图片预览
型号: PIC16F57-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 基于闪存的8位CMOS微控制器系列 [Flash-Based, 8-Bit CMOS Microcontroller Series]
分类和应用: 闪存微控制器
文件页数/大小: 88 页 / 1373 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F5X  
3.2.1  
GENERAL PURPOSE REGISTER  
FILE  
3.2  
Data Memory Organization  
Data memory is composed of registers or bytes of  
RAM. Therefore, data memory for a device is specified  
by its register file. The register file is divided into two  
functional groups: Special Function Registers (SFR)  
and General Purpose Registers (GPR).  
The register file is accessed either directly or indirectly  
through the File Select Register (FSR). The FSR  
register is described in Section 3.7 “Indirect Data  
Addressing; INDF and FSR Registers”.  
The Special Function Registers include the TMR0  
register, the Program Counter (PC), the STATUS regis-  
ter, the I/O registers (ports) and the File Select Register  
(FSR). In addition, Special Purpose Registers are used  
to control the I/O port configuration and prescaler  
options.  
FIGURE 3-3:  
PIC16F54 REGISTER FILE  
MAP  
File Address  
INDF(1)  
TMR0  
PCL  
00h  
01h  
02h  
03h  
04h  
05h  
06h  
The General Purpose Registers are used for data and  
control information under command of the instructions.  
STATUS  
FSR  
For the PIC16F54, the register file is composed of 7  
Special Function Registers and 25 General Purpose  
Registers (Figure 3-3).  
PORTA  
PORTB  
For the PIC16F57, the register file is composed of 8  
Special Function Registers,  
8 General Purpose  
07h  
Registers and 64 additional General Purpose  
Registers that may be addressed using a banking  
scheme (Figure 3-4).  
General  
Purpose  
Registers  
For the PIC16F59, the register file is composed of 10  
Special Function Registers,  
6 General Purpose  
Registers and 128 additional General Purpose  
Registers that may be addressed using a banking  
scheme (Figure 3-5).  
1Fh  
Note 1: Not a physical register. See Section 3.7  
“Indirect Data Addressing; INDF and FSR  
Registers”.  
FIGURE 3-4:  
PIC16F57 REGISTER FILE MAP  
FSR<6:5>  
00  
01  
10  
11  
File Address  
00h  
INDF(1)  
TMR0  
PCL  
20h  
40h  
60h  
01h  
02h  
03h  
04h  
05h  
06h  
STATUS  
FSR  
Addresses map back to  
addresses in Bank 0.  
PORTA  
PORTB  
07h  
08h  
PORTC  
General  
Purpose  
Registers  
2Fh  
30h  
4Fh  
50h  
6Fh  
0Fh  
10h  
70h  
General  
Purpose  
Registers  
General  
Purpose  
Registers  
General  
Purpose  
Registers  
General  
Purpose  
Registers  
1Fh  
3Fh  
5Fh  
7Fh  
Bank 0  
Bank 1  
Bank 2  
Bank 3  
Note 1: Not a physical register. See Section 3.7 “Indirect Data Addressing; INDF and FSR Registers”.  
DS41213D-page 14  
© 2007 Microchip Technology Inc.